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    NCU Institutional Repository > 行政單位 > 秘書室 > 期刊論文 >  Item 987654321/104789


    請使用永久網址來引用或連結此文件: https://ir.lib.ncu.edu.tw/handle/987654321/104789


    題名: Power-efficient instancy aware DRAM scheduling
    作者: 周景揚;JOU, Jing-Yang;LAI, Bo-Cheng Charles;PAN, Gung-Yu;LAI, Chih-Yen
    貢獻者: 秘書室
    關鍵詞: Clustering;Computer simulation;Controllers;DRAM;dynamic power management;Dynamic random access memory;energy-aware systems;Mathematical models;Performance degradation;Policies;Power management;scheduling
    日期: 2015-04-01
    上傳時間: 2026-04-23 11:58:08 (UTC+8)
    出版者: Maruzen Co., Ltd/Maruzen Kabushikikaisha;The Institute of Electronics, Information and Communication Engineers
    摘要: 摘要: Nowadays, computer systems are limited by the power and memory wall. As the Dynamic Random Access Memory (DRAM) has dominated the power consumption in modern devices, developing power-saving approaches on DRAM has become more and more important. Among several techniques on different abstract levels, scheduling-based power management policies can be applied to existing memory controllers to reduce power consumption without causing severe performance degradation. Existing power-aware schedulers cluster memory requests into sets, so that the large portion of the DRAM can be switched into the power saving mode; however, only the target addresses are taken into consideration when clustering, while we observe the types (read or write) of requests can play an important role. In this paper, we propose two scheduling-based power management techniques on the DRAM controller: the inter-rank read-write aware clustering approach greatly reduces the active standby power, and the intra-rank read-write aware reordering approach mitigates the performance degradation. The simulation results show that the proposed techniques effectively reduce 75% DRAM power on average. Compared with the existing policy, the power reduction is 10% more on average with comparable or less performance degradation for the proposed techniques.
    其他題名: IEICE Trans. Fundamentals
    出版者: The Institute of Electronics, Information and Communication Engineers
    出版日期: 2015
    出處: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 2015, Vol.E98.A(4), pp.942-953
    資源來源: J-STAGE Free
    版權: 2015 The Institute of Electronics, Information and Communication Engineers
    識別號: ISSN: 1745-1337
    識別號: ISSN: 0916-8508
    識別號: EISSN: 1745-1337
    識別號: DOI: 10.1587/transfun.E98.A.942
    顯示於類別:[秘書室] 期刊論文

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