Siblings Research Project [36/36] journal & Dissertation [951/951] retired tests [397/397] Collection Statistics Item counts issued in 3 years: 391(12.94%) Items With Fulltext: 3021(100.00%) Download counts of the item Download times greater than 0: 3021(100.00%) Download times greater than 100: 2826(93.55%) Total Bitstream Download Counts: 1755669(72.26%) Last Update: 2025-12-23 22:56 Top Upload Loading... Top Download Loading... Recent Submissions 無感測器永磁同步馬達之 I-F 啟動與 ASMO-FOC 無縫切換控制... 石墨烯奈米帶之電子熱整流探討:石墨烯異質結構拓樸態的傳輸應用;Inve... 基於40nm 65kb 1T1R 多阻態電阻式記憶 體的真亂數產生器 ... 具有高可靠度之通道擊穿型28nm 2kb 雙電晶體單次編程記憶體晶片;... 電網失真不平衡下相位偵測標么化延遲信號消除鎖相迴路之研製;Develo... 基於虛擬磁通無電流感測直接功率控制不平衡電網下三相維也納整流器系統之研... 基於SRAM的記憶體內運算之測試;Testing of SRAM-ba... 基於SRAM之Systolic計算式記憶體架構與設計自動化;Systo... 使用120-nm GaN HEMT 與 100-nm GaAs pHE... 使用 120-nm GaN HEMT 與 100-nm GaAs pH...

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Showing items 521-530 of 3021. (303 Page(s) Totally) << < 16 17 18 19 20 21 22 23 24 25 > >> View [10|25|50] records per page

Date	Title	Authors
2022-04-27	考慮電壓衰退和繞線影響以優化電路時序之電源供應網絡精煉策略;Power Distribution Network Refinement for Timing Optimization Through IR-drop and Routing Trade-off	張弘翰; Chang, Hung-Han
2022-04-21	應用於第五代通訊之B類連續模式氮化鎵功率放大器暨互補式金氧半導體堆疊式功率放大器之研製;Implementations on Class-B Continuous Mode GaN Power Amplifiers and CMOS Stacked Power Amplifier for 5G Communications.	羅時凱; Lo, Shih-Kai
2022-04-19	基於FPGA的可重構神經網路加速器應用於Tiny YOLO-V3;An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3	童迺婕; Tung, Nai-Chieh
2022-04-15	以非局部的解碼器-擠壓-激勵網路及自適應深度列表達成基於編碼器-解碼器的單鏡頭深度估計任務;Monocular Depth Estimation based on encoder-decoder with Non-Local Decoder-Squeeze-Excitation Network and Adaptive Depth List	萬偉中; Wan, Wei-Chung
2022-04-15	可自定義之語者驗證系統與其特徵擷取模組之硬體實現;A Hardware Implementation of Feature Extraction for Self-Defined Speaker Verification System	王喬立; Wang, Chiao-Li
2022-04-06	基於鏡像神經元訓練之深度學習想像運動模型;A Deep Learning Model for Motor Imagery based on Mirror Neuron Training	陳泓夬; Chen, Hong-Guai
2022-03-22	應用於穿戴式生醫電子之使用內置時脈產生器非同步全差動十一位元連續漸進式類比數位轉換器;An 11-bit Fully Differential Asynchronous SAR ADC with the Internal Clock Generator for Biomedical Wearable Device	榮志堯; JUNG, CHIH-YAO
2022-03-01	適用於 10GBASE-T 及 IEEE 802.3bz 之高速低密度同位元檢查碼解碼器設計與實現;A Design and Implementation of High-Throughput LDPC code Decoder for 10GBASE-T and IEEE 802.3bz Standard	韓毅; Han, YI
2022-01-22	在多樣態的晶圓圖中找尋隱藏的刮痕樣態;Hidden Scratch Pattern Recognition In Multiple Type	張凱程; Cahng, Kai-Cheng
2022-01-21	具共用方塊無偏移技術之2.4 GHz類比式 雙迴路校正倍頻延遲鎖相迴路;2.4 GHz Analog Dual Loop Calibration Multiplying Delay Locked Loop with Block-Sharing Offset-Free Technology	黃大祐; Huang, Ta-Yu

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