結合等化與取樣時脈同步雙迴路電路設計; Design of Dual-loop TFO Combining with TEQ for Wired-line Communication Systems

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/61137

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/61137

Title:	結合等化與取樣時脈同步雙迴路電路設計;Design of Dual-loop TFO Combining with TEQ for Wired-line Communication Systems
Authors:	黃寶儒;Huang,Bao-Ru
Contributors:	電機工程學系
Keywords:	正交分頻多工;取樣時脈偏移;OFDM;TFO
Date:	2013-07-22
Issue Date:	2013-08-22 12:13:00 (UTC+8)
Publisher:	國立中央大學
Abstract:	正交分頻多工為現在通訊系統中常用的載波調變技術，是將頻寬分成多個正交的載波。但由於傳送端與接收端的不同步，產生了非同步效應破壞了相互正交，降低了系統的效能。在本論文中首先介紹了正交分頻多工的非同步效應，接著說明估測及補償取樣時脈偏移的方法，然後提出利用自動增益與載波回復中的相位誤差估測出相位旋轉而後補償取樣時脈偏移。在電路方面，本論文結合了傳統時域等化器與內插器電路，將係數收斂後閒置的電路當做內插器使用，以提高電路的使用率。 Orthogonal frequency division multiplex, by dividing the bandwidth into multiple orthogonal carriers, is one of the carrier modulation techniques now commonly used in communication system. The orthogonality, however, is impaired by the unsynchronization of the frequency between transmitter and the receiver, which will decrease the efficiency of the system. The thesis at first introduces the unsynchronization effect in orthogonal frequency division multiplex and how to estimate as well as how to compensate the sampling clock offset. We use the phase errors in automatic gain and carrier recovery to estimate the sampling clock offset resulting in the phase rotation. In the circuit design section, due to the combination of the time domain equalizer and the interpolator circuit, the idle circuit of TEQ can be used as the interpolator circuit to increase the efficiency of the circuit system.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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