撞擊游離的等效電路模型與其在半導體元件模擬上之應用; An Equivalent Circuit of Impact-Ionization and its Applications on Semiconductor Devices

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Title:	撞擊游離的等效電路模型與其在半導體元件模擬上之應用;An Equivalent Circuit of Impact-Ionization and its Applications on Semiconductor Devices
Authors:	李思儒;Szu-Ju Li
Contributors:	電機工程研究所
Keywords:	撞擊游離;等效電路模型;半導體元件模擬;impact ionization;simulation;SCR
Date:	2002-06-19
Issue Date:	2009-09-22 11:44:54 (UTC+8)
Publisher:	國立中央大學圖書館
Abstract:	本論文主要以分析撞擊游離(impact-ionization)的機制並建立一維及二維的撞擊游離等效電路模型。在二維模型的建立上，我們同時探討於二維x-y方向的電場與電流密度分布以及撞擊游離的機制在描述元件的接面上所發生的累增崩潰(avalanche breakdown)。因此，在建立起一維及二維撞擊游離等效電路模型後，我們使用一維及二維的二極體與雙載子接面電晶體來驗證其模型的正確性並比較其撞擊游離的機制效應。在撞擊游離等效電路模型的應用上，我們使用Thyristor功率元件來觀察撞擊游離的效應。同時於更深入的呈現元件的SCR特性曲線，我們利用了調變外加電壓移動負載線(load line)來尋找保持電流(holding current)。最後，在Thyristor功率元件的模擬方面，面臨到數值運算上的困難，因此我們採用regrid的方法來加強程式的收斂性。 In this thesis, we analyse the impact-ionization mechanism and build up 1D and 2D impact-ionization circuit model. In 2D environment, we study the two- dimensional x-y directions distributions in electric field and current density. The impact-ionization mechanism causes the junction avalanche breakdown. Therefore, after building up the 1D and 2D impact-ionization model, we use 1D and 2D PN diode and BJT for verification. In device application, we use the power device thristor to observe impact-ionization effects. To present complete SCR characteristics, we use the load line concept with modulating applied bias to find the holding current. Last, in SCR simulation, we face the numerical computing challenge, and we use the regrid method to enhance the program convergence.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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