| 摘要: | 本研究使用在未摻雜的矽基板上，以有機金屬化學氣相沉積(MOCVD)成長氮化硼(BN)與氮化鋁(AlN)之磊晶樣品，對其進行霍爾效應與傳輸線模型(TLM)量測分析。霍爾量測上，以Van der Pauw結構進行常溫與低溫霍爾效應量測，發現濃度約3.95×10^15 /cm^2和4.9×10^14 /cm^2的自由載子電洞在300K常溫至90K低溫時濃度變化幅度極小，載子遷移率在溫度降低的過程有些微提高的趨勢；TLM分析方面，藉由不同的快速熱退火條件優化金屬-半導體接觸，最終擬合出的接觸電阻約0.3 Ω-mm。在得到良好歐姆接觸後，進行平面式金屬-絕緣層-半導體場效電晶體(MIS-FETs)和MIS電容之製作和量測，以分析不同載子濃度磊晶樣品之元件電學特性，並額外以ALD成長閘極介電層，探討其對元件特性的影響。然而在電晶體轉移特性與二極體C-V特性上，發現元件在施加閘極偏壓的過程，汲極電流維持在定值而無法關閉，而二極體電容值也維持在定值，電容值始終由BN介電層電容主導，顯示元件並沒有轉換至其他操作區的特性，也代表閘極無法有效調變自由載子濃度。為了進一步釐清高濃度自由載子成因，以及其對於元件電流與電容特性之影響，本研究遂針對矽基板進行表面分析，包括二次離子質譜（SIMS）與展延電阻分析（SRP）。SIMS量測結果觀察到，矽基板表面至大約六百奈米有著濃度10^18 /cm^3以上的硼元素分佈，以及藉由SRP分析到在相同的深度區間內，有著高濃度的自由載子電洞分佈，電阻率也相對本質矽基板大幅下降，顯示在磊晶成長BN的過程中，本質矽基板表面藉由硼的摻雜原子擴散(Dopant Diffusion)成為重摻雜之p型半導體，而電洞在高溫下完全活化，載子濃度較高樣品之矽基板則是成為簡併半導體(Degenerate semiconductor)。最終結合表面分析結果，以簡併和重摻雜之半導體特性，對霍爾量測時的載子傳輸機制，以及元件電學特性做說明。;This study employed samples consisting of boron nitride (BN) and aluminum nitride (AlN) epitaxial layers grown on undoped silicon substrates by metal–organic chemical vapor deposition (MOCVD). Hall effect and transmission line model (TLM) measurements were then performed on the samples. The Hall effect was measured using the Van der Pauw structure at both room and low temperatures. It was found that the hole concentrations, approximately 4×10^15 /cm^2 and 4.9×10^14 /cm^2, exhibited minimal variation from 300 K down to 90 K, while the carrier mobility showed a slight increase as temperature decreased. For the TLM analysis, the metal–semiconductor contact was optimized through rapid thermal annealing (RTA) under various conditions, achieving a fitted contact resistance of approximately 0.3 Ω-mm. After obtaining good ohmic contacts, planar metal–insulator–semiconductor field-effect transistors (MIS-FETs) and MIS capacitors were fabricated and measured to analyze the electrical characteristics of epitaxial samples with different carrier concentrations. Additionally, an atomic layer deposition (ALD) process was used to form the gate dielectric, in order to investigate it’s influence on device performance. However, in the transistor transfer characteristics and diode C–V measurements, the drain current remained constant under varying gate bias and could not be turned off, while, the capacitance also remained unchanged and was dominated by the BN dielectric layer, indicating that the devices did not transition to other operating regions, these also suggest that the gate failed to effectively modulate the free carrier concentration. To further clarify the origin of the high-density free carriers and their influence on the electrical behavior, surface analyses of the silicon substrates were conducted using secondary ion mass spectrometry (SIMS) and spreading resistance profiling (SRP). SIMS results revealed a boron concentration exceeding 10^18 /cm^3 within approximately 600 nm from the silicon surface. SRP analysis showed a high hole concentration and significantly reduced resistivity in the same depth range. These findings indicate that during BN epitaxy, dopant diffusion of boron into the intrinsic silicon substrate transformed the surface into a heavily doped p-type semiconductor, with holes fully activated at high temperature. For the sample with higher carrier concentrations, it’s silicon substrate became degenerate semiconductor. Finally, by combining the surface analysis results, the carrier transport mechanisms observed in Hall measurements, as well as the electrical characteristics of the devices, were interpreted based on the properties of degenerate and heavily doped semiconductors. |
