本研究旨在分析與驗證基於峰值偵測之可變步階演算法之延伸探討，在 112 Gbps 四 階脈衝振幅調變 (PAM-4) 之高速串列傳輸 (SerDes) 系統中的效能。在 112G PAM-4 低訊雜比(SNR)環境下的高速鏈路中，標準 LMS 演算法面臨收斂速度與穩態誤差之間 的關鍵權衡(Trade-off)問題；VSS-NLMS 演算法透過動態調整步階(Step-size)，旨在同 時實現快速收斂與低穩態均方根誤差(RMSE)。 本論文建立一完整的 SerDes 端對端模擬平台，包含由 S 參數定義的業界標準通道模 型、前饋等化器(FFE)與決策回饋等化器(DFE)之組合架構。透過詳盡的學習曲線 (Learning Curve)與位元錯誤率(BER)分析，本研究將量化比較 VSS-NLMS、歸一化最小 均方與標準 LMS 演算法，在高速 PAM-4 通道下的收斂特性與穩態效能。本研究驗證 VSS-NLMS 演算法在解決傳統 LMS 權衡問題上的優勢，並評估其作為下一代 SerDes 系統中先進等化器核心演算法的可行性。此外，實際高速互連在系統層級可能受到突 發性電磁干擾所致之脈衝/突波雜訊(例如 ESD 與 EFT/Burst 等瞬態事件)，其非高斯 且具厚尾特性易造成自適應等化器步長估測與權重更新被離群誤差主導。故本研究進 一步於步長估測與權重收斂路徑導入基於 M-估計量之影響函數，以提升演算法面對突 波干擾時之收斂穩健性。 ;This research aims to analyze and validate the performance of the Variable Step-Size Normalized Least Mean Square (VSS-NLMS) algorithm, specifically focusing on its peakdetection and energy-estimation extensions, within a 112 Gbps PAM-4 (Four-Level Pulse Amplitude Modulation) high-speed Serializer/De-serializer (SerDes) system. In high-speed links, the standard LMS algorithm faces a critical trade-off between convergence speed and steady-state error. The VSS-NLMS algorithm, by dynamically adjusting its step-size, seeks to achieve both fast convergence and low steady-state Root Mean Squared Error (RMSE) simultaneously. This thesis establishes a complete end-to-end SerDes simulation platform, incorporating an industry-standard channel model defined by S-parameters and a combined Feed-Forward Equalizer (FFE) and Decision Feedback Equalizer (DFE) architecture. Through detailed analysis of learning curves and Bit Error Rate (BER), this study quantitatively compares the convergence characteristics and steady-state performance of VSS-NLMS, Normalized LMS (NLMS), and standard LMS algorithms under a high-speed PAM-4 channel. This work validates the advantages of the VSS-NLMS algorithm in resolving the traditional LMS tradeoff and evaluates its feasibility as an advanced equalizer core for next-generation SerDes systems. And high-speed interconnects may be subject to sudden electromagnetic interference(ESD) at the system level, resulting in pulse/surge noise(such as ESD and EFT/Burst transient events). This non-Gaussian, thick-tailed noise can easily cause outlier errors to dominate the adaptive equalizer step size estimation and weight updates. Therefore, this study further incorporates an influence function based on the M-estimater into the step size estimation and weight convergence path to improve the algorithm′s convergence robustness in the face of surge interference.
