摘要(英) |
As the evolution of the semiconductor process technology, the process variation will be more and more serious in device mismatch and wire parasitic. In addition, analog circuit design process can easily become the bottleneck in the overall SoC design process, mainly because it is much more complicated and error-prone. A reliable automation tool will become the key point to enhance the efficiency of the overall circuit design.
For the series resistor array in resistor-string DAC, we can effectively reduce the random error by the permutation and space correlation of resistors. However, the high precision resistor string and resistor array permutation will increase the difficulty of the physical layout, and the inconsistency of the parasitic resistance will cause the circuit system error. In this consideration, if a good arrangement can not be achieved in the physical layout automation and balance parasitic effects, it will eventually fall short. So the automated routing and interconnect resistance balance has already indispensable.
In this thesis, first, we define the matrix model of the series resistor array routing problem. On the basis of this model, each resistor connected wires can be guaranteed to have the same layer distribution, the same number of VIA, and the consistent connection form. Then we propose an automatic resistance-balanced routing algorithm (ARBa), which is applied to arbitrary permutation, any bits resistor strings automation layout and routing. Furthermore, this method will achieve in extremely irregular Tango March permutation, and balance the drastic interconnects resistance variation. While developing a graphical user interface (GUI) tool, it can provide users to set routing information, and present the parasitic resistance analysis of each wire in the overall routing clearly.
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參考文獻 |
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