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姓名 趙文吉(Wen-Chi Chao) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 下世代數位家庭之千兆級無線通訊系統
(Gigabit Wireless Communication Systems for Next-Generation Digital-Home Applications)相關論文 檔案 [Endnote RIS 格式]
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摘要(中) 我們設計一適用於室內之高生產量的4×4多輸入輸出正交分頻多工調變的無線通訊傳輸系統,並將其硬體於FPGA開發板中實現完成。並且此無線通訊收發機的傳送機與接收機星座圖對應皆可支援到64QAM,多輸入輸出系統支援到4根傳送天線對應4根接收天線。此無線收發機可支援三個不同子載波數的正交分頻多工調變系統分別對應到128、256與512個子載波模組。接收機設計中,我們在時域包含符元邊界偵測與小數載波頻率偏移做估測與補償的相關硬體。在頻域上,我們也有針對取樣時脈偏移與殘餘載波頻率偏移做估測與補償做追蹤的相關機制,以預防取樣時脈偏移與殘餘載波頻率偏移降低此套無線通訊系統的系統效能。另外,多輸入輸出系統訊號解調我們採用一次排序後QR分解加上K-best球面解碼器來還原原始資料,我們所採用的多輸入輸出系統在系統模擬上可以得到不錯的效能。在硬體實現模擬結果方面,此套系統在操作時脈為55MHz的情況下可以正常運作,其傳輸輸速率可達到891Mbps。
摘要(英) Implementation of a 4×4 MIMO-OFDM baseband transceiver on FPGA platform for indoor high throughput wireless communication systems is presented. Both the transmitter and the receiver support 64-QAM constellation and spatial multiplexing up to four antennas. The system has three operation modes corresponding to different FFT sizes of 128, 256, and 512 points. At the receiver, we incorporate symbol timing detection and carrier frequency offset (CFO) acquisition modules in the time domain. The subsequent CFO and sampling clock offset (SCO) tracking mechanism is also designed in the frequency domain to prevent from their severe destruction of the system performance. In addition, MIMO signal detection is accomplished by one-time sorted QR decomposition and K-best sphere decoding. Simulation results are provided to show the satisfying system performance. From hardware implementation results, the system can work at 55-MHz sampling frequency for ISE Post-Rout result, which is capable to offer 891Mbps transmission rate.
關鍵字(中) ★ 多輸入輸出正交分頻多功調變系統 關鍵字(英) ★ MIMO-OFDM 論文目次 目錄 iii
圖示目錄 vii
表格目錄 xi
第一章 緒論 1
1.1 研究動機 1
1.2 論文組織 2
第二章 系統簡介 3
2.1系統規格介紹 3
2.2發送機 4
2.3通道模組 6
2.3.1多路徑衰減通道 7
2.3.2加成性白高斯雜訊 9
2.3.3載波頻率偏移 10
2.3.4取樣時脈偏移 12
2.4接收機 14
第三章 接收機相關演算法 16
3.1概述 16
3.2初始同步 16
3.2.1封包偵測與符元邊界偵測 17
3.2.2小數載波頻率偏移估測 19
3.2.3小數載波頻率偏移補償 20
3.3快速傅立葉轉換 21
3.3.1 Radix-2、Radix-4、Radix-2/4/8介紹 21
3.3.2系統演算法架構 24
3.4取樣時脈偏移與殘餘載波頻率偏移追蹤 25
3.4.1取樣時脈偏移與殘餘載波頻率偏移估測 25
3.4.2取樣時脈偏移與殘餘載波頻率偏移補償 29
3.5通道估測 31
3.6排序後QR分解 32
3.6.1通道矩陣排序 33
3.6.2 Given Rotation 演算法 34
3.6.3實數與複數QR分解 34
3.6.4系統QR分解 36
3.7 K-Best 球型解碼器 37
3.7.1非固定常數K值 38
3.7.2 Sort演算法 38
3.7.3一補數的部分歐基里德距離解 39
3.8 系統性能模擬 40
3.8.1同步效應相關演算法補償比較 40
3.8.2多輸入多輸出解碼相關演算法比較 44
第四章 接收機硬體架構 50
4.1 接收機架構 50
4.2 初始同步 50
4.2.1 封包偵測與符元邊界偵測 51
4.2.2 小數載波頻率偏移估測 53
4.2.3 小數載波頻率偏移補償 54
4.2.4 初始同步硬體共用 54
4.3 快速傅立葉轉換 55
4.3.1 快速傅立葉轉換 55
4.3.2 位元反轉架構 61
4.4取樣時脈偏移與殘餘載波頻率偏移估測 64
4.4.1取樣時脈偏移與殘餘載波頻率偏移估測 64
4.4.2線性最小平方誤差法 66
4.4.3取樣時脈偏移與殘餘載波頻率偏移補償 68
4.5 通道估測 69
4.5.1 通道參數估測 69
4.5.2 資料緩衝 70
4.6 排序後QR分解 71
4.6.1通道矩陣排序 71
4.6.2 座標軸旋轉數位計數器 73
4.6.3複數QR分解 74
4.6.4實數QR分解 75
4.7 K-Best 球型解碼器 76
4.7.1 非固定常數K值 76
4.7.2 排序演算法 76
4.8 硬體系統性能(系統浮點數與定點數比較) 78
4.9系統記憶體共用 80
4.10 收發機硬體使用率 83
4.10.1最大路徑延遲 83
4.10.2硬體使用率 85
第五章 硬體實現 87
5.1 收發機硬體實現 87
5.2 傳送機與接收機使用排線對接硬體實現 89
5.2.1 數位時脈處理器 90
5.2.2 硬體實現 92
5.3 相關論文比較 95
第六章 結論與未來展望 97
參考文獻 98
參考文獻 [1]IEEE 802.11 TGn channel model special committee, “TGn Channel Models for IEEE 802.11 WLANs”, IEEE DOC: IEEE 802.11-03/940r4, May 2004
[2]A. Fort, J.-W. Weijers, V. Derudder, W. Eberle, A. Bourdoux, “A performance and complexity comparison of auto-correlation and cross-correlation for OFDM burst synchronization,” in Proc.IEEE International Conference on Acoustic, Speech and Signal Processing, vol. 2, Apr. 2003, pp. II-341-4.
[3]P.Y. Tsai, Z.M. Chang, Z.Y. Huang, W.J. Jau, “Design and evaluation of a 4×4 MIMO transceiver for gigabit indoor wireless communication”, IEEE APCCPS 2010-Dec, pp955-958.
[4]Ting-Jung Liang; Xin Li; Irmer, R.; Fettweis, G.; “Synchronization in OFDM-based
WLAN with transmit and receive diversities, “IEEE 16th International Symposium on Personal, Indoor and Mobile Radio Communications, 2005. Volume 2, 11-14 Sept.2005 Page(s):740-744
[5]Shousheng He, M. Torkelson, “Designing pipeline FFT processor for OFDM (de)modulation,” International Symposium on Signals, Systems, and Electronics, 1998. ISSSE 98. Oct. 1998. pp.257 – 262.
[6]P.Y. Tsai, H.Y. Kang, T.D. Chiueh, “Joint weighted least squares estimation of frequency and timing offset for OFDM system over fading channels ”, The 57th IEEE Semiannual VTC 2003-spring. pp.2543-2547
[7]R.H. Lai, C.M. Chen, P.A. Ting, Y.H. Huang, “A modified sorted-QR decomposition algorithm for parallel processing in MIMO detection”, IEEE ISCAS 2009-May pp.1405-1408
[8]A. Maltsev, V. Pestretsov, R. Maslennikov, and A. Khoryaev, “Triangular systolic array with reduced latency for QRdecomposition of complex matrices,” in Proc. Int. Symp. Circuits and Systems, May 2006, pp. 385-388.
[9]Z.Y. Huang, P.Y. Tsai, “High-Throughput QR Decomposition for MIMO Detection in OFDM Systems”, IEEE ISCAS, 2010-May, pp.1492-1495.
[10]P.Y. Tsai, W.T. Chen, X.C. Lin, M.Y. Huang, “A 4×4 64-QAM reduced-complexity K-best MIMO detector up to 1.5Gbps” , IEEE ISCAS, 2010-May, pp.3953-3956.
[11]P.Y. Tsai, T.D. Chiueh, “A Low-Power Multicarrier-CDMA Downlink Baseband Receiver for Future Cellular Communication Systems”, IEEE Circuits and System Society, 2007-Oct, pp2229-2239.
[12]Xiline, Virtex-5 FPGA User Guides v3.2, (2007-12) .
[13]Xiline, Virtex-4 FPGA User Guides v2.6, (2008-12).
[14]P. Petrus, and et al., “An Integrated Draft 802.11n Compliant MIMO Baseband and MAC Processor ,” IEEE Solid-State Circuits Conference, Feb. 2007, pp. 266-602
[15]A. Burg, and et al., “A 4-Stream 802.11n Baseband Transceiver in 0.13 μm CMOS ,” IEEE Symposium on VLSI Circuits, June 2009, pp. 282-283.
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