實現一個寬負載高效能直流對直流降壓型轉換器

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姓名

邱展毅(Chan-I Chiu) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

實現一個寬負載高效能直流對直流降壓型轉換器
(On the Implementation of an Ultra-Wide-Load High-EfficientDC-DC Buck Converter)

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摘要(中)

可攜式電子產品輕薄短小功能完整是產品趨勢也是主要的需求，因此低功率高效能成為可攜式電子產品的首要考量，這些利用電池為電力來源的電子電路需要一個能夠提供穩定電壓的電源轉換電路，此電源轉換電路必須是低功率消耗與高轉換效能，以增加電池的壽命與延長電池的工作時間，為了提升轉換效能，本論文提出了一個電流模式控制降壓型穩壓器。
本論文所提出的電流模式控制降壓型穩壓器，其原理主要利用偵測電感上電流變化以加速負載改變時之暫態反應時間，根據電路回授機制將輸出電壓控制在所預期的數值，而不會受到負載電流的影響，再將穩壓器加入兩個P型功率電晶體，根據不同的輸出負載電流的應用，去做切換電晶體的動作，進而提升整體的轉換效能。相較於一般的電流模式控制穩壓器，此穩壓器會有較高的轉換效能，因此適用於可攜式電子產品中。
此電流模式控制降壓型穩壓器的電路設計是以台灣積體電路製造股份有限公司0.35μm 3.3V互補式金氧半製程來實現，工作電壓的範圍為2.5V~4.5V，輸出電壓為1.8V，操作頻率為2MHz，負載電流範圍為0.03A~1.2A，最大轉換效能為96.36%，在輸出負載電流為30mA時，轉換效能仍然有90%。

摘要(英)

Electronic technology changes rapidly, the salient fatures of shorter, thiner, and full functionality, are the major demands of protable electronics. Low power consumption or power efficiency enhancement is the main design consideration of these portable electronics. The sub-circuits of these portable electronics use batteries as their power sources, and need a stable supply voltage generated by power converters. These power converters must have low power consumption and high efficiency to extend the service time of portable electronics. Thus, a high efficiency current mode buck converter is presented in this thesis.
This thesis proposes a current mode buck converter that senses the inductor current variation to accelerate response time, and applies the mechanism of feedback-loop theory to control the output voltage at the desired value; In order to achive ultra-wide-load and high conversion efficiency, the converter with two P-type power transistors is proposed.
This proposed current mode buck converter is implemented with TSMC 0.35μm 3.3V CMOS process. In the proposed buck converter, the operation voltage is from 2.5V to 4.5V, the output voltage is 1.8V, the operation frequency is 2MHz, the output current is from 0.03A to 1.2A, and the highest efficiency is 96.36%, when the output load current is 30mA, the efficiency is still 90%.

關鍵字(中)

★ 脈衝寬度調變
★ 轉換效能
★ 負載電流
★ 電流模式控制
★ 直流對直流降壓型轉換器

關鍵字(英)

★ Pulse Width Modulation(PWM)
★ Efficiency
★ Load Currents
★ Current-Mode Control
★ DC-DC Buck Converter

論文目次

摘要 I
Abstract II
致謝 III
目錄 IV
圖目錄 VI
表目錄 IX
第一章緒論 1
1.1 研究背景簡介 1
1.2 研究動機 2
1.3 論文架構 3
第二章直流轉直流穩壓器概論 4
2.1 穩壓器的種類 4
2.1.1 線性穩壓器 (Linear Regulator) 5
2.1.2 切換式電容穩壓器 (Switching Capacitance Regulator) 6
2.1.3 切換式穩壓器 (Switching Regulator) 7
2.2 切換式穩壓器分類 8
2.2.1 降壓型轉換器 (Buck Converter or Step-Down Converter) 9
2.2.2 其他類型轉換器 14
2.3 控制電路方法 16
2.3.1 脈波寬度調變 (Pulse Width Modulation, PWM) 16
2.3.2 脈波頻率調變 (Pulse Frequency Modulation, PFM) 17
2.4 切換式穩壓器規格定義與說明 18
2.4.1 輸入電壓 (Input Voltage) 19
2.4.2 輸出電壓漣波 (Output Voltage Ripple) 19
2.4.3 線性調節度 (Line Regulation) 20
2.4.4 負載調節度 (Load Regulation) 20
2.4.5 暫態響應 (Transient Response) 20
2.4.6 轉換效能 (Efficiency) 22
2.4.7 電磁干擾 (Electromagnetic Interference, EMI) 25
第三章降壓型切換式穩壓器架構 26
3.1 控制電路分類 26
3.1.1 電壓模式控制 (Voltage Mode Control) 27
3.1.2 電流模式控制 (Current Mode Control) 28
3.2 電流模式控制基本理論 30
3.2.1 次諧波振盪 (Sub-Harmonic Oscillation) 30
3.2.2 斜率補償 (Slope Compensation) 33
3.3 小訊號分析 36
3.3.1 系統頻率響應分析 36
3.4.2 補償增益GC(s)架構 40
第四章降壓切換式穩壓器電路設計與模擬 42
4.1 降壓型穩壓器 42
4.1.1 帶差參考電路 (Bandgap Reference) 43
4.1.2 誤差放大器 (Error Amplifier) 47
4.1.3 電流偵測電路 (Current Sensing Circuit) 49
4.1.4 電壓轉電流轉換電路 (V-I Converter) 51
4.1.5 比較器電路 (Comparator Circuit) 54
4.1.6 時脈及斜坡產生電路 (Clock & Ramp Generator) 56
4.1.7 脈波寬度調變電路 (Pulse Width Modulator) 58
4.2 降壓型切換式穩壓器模擬結果 58
4.2.1 暫態模擬 60
4.2.2 線性調節度 (Line Regulation) 62
4.2.3 負載調節度 (Load Regulation) 63
4.2.4 轉換效能 (Efficiency) 63
4.3 寬負載高效能降壓型切換式穩壓器模擬結果 65
4.3.1寬負載高效能穩壓器設計 66
4.3.2 二組P型功率電晶體之穩壓器設計 68
4.3.3 轉換效能比較 71
4.3.4 外接式功率電晶體討論 72
第五章結論 74
5.1 結論 74
5.2 未來改進方向 74
參考文獻 76

參考文獻

[1] H. H. Ko, “A high efficiency synchronous CMOS switching buck regulator with accurate current sensing technique,” MS Thesis, Department of Electrical Engineering, National Central University, 2007.
[2] G. A. Rincon-Mora and P. E. Allen, “A low-voltage, low quiescent current, Low drop-out regulator,” IEEE J. Solid-State Circuits, vol. 33, no. 1, pp.36-44, Jan.
1998.
[3] E. Bayer, H. Sehmeller, “Charge pump with active cycle regulation-closing the gap between linearand skip modes,” IEEE Power Electronics Specialists Conference, pp. 1497-1502, June. 2000.
[4] R. W. Erickson and D. Maksimovic, Fundamentals of power electronics, 2nd edition, John Wiley, New York, 1950.
[5] J. Xiao, A.V. Peterchev, J. Zhang, and S.R. Sanders, "A 4-uA quiescent-current dual-Mode digitally controlled buck converter IC for cellular phone applications," IEEE J. Solid-StateCircuits, vol. 39, no. 12, pp. 2342-2348, Dec. 2004.
[6] M. H. Huang, P. C. Fan, and K. H. Chen, “Low-ripple and dual-phase charge pump circuit regulated by switched-capacitor-based bandgap reference,” IEEE Trans. on Power Electronics., vol. 24, no. 5, pp. 1161–1172, May 2009.
[7] M. X. Lu, B. H. Hwang, J. J. Chen, Y.S. Hwang, “A sub-1V voltage-mode DC-DC buck converter using PWM control technique,” IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC), pp.1-4, Dec. 2010.
[8] C. C. Chen, “A high efficiency current mode control DC-DC buck converter,” MS Thesis, Department of Electrical Engineering, National Central University, 2010.
[9] S. Y. Wang, “Improved light-load efficiency for switched mode buck converter using PWM operated power-save Mode,” MS Thesis, Department of Electrical Engineering, National Tsing-Hua University, 2004.
[10] H. W. Whittington, B. W. Flynn, D.E. Macpherson, Switched mode power supplies: design and construction, 2nd edition, Kluwer Academic Publishers, 2001.
[11] R. B. Ridly, “Current Mode or Voltage Mode?,” Switching Power Magazine, pp.4-5, Oct. 2000.
[12] C. C. Yang, C. Y. Wang and T. H. Kuo, ”Current-mode converters with adjustable-slope compensating ramp,” IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 654-657, Dec. 2006.
[13] C. F. Lee and P. Mok, “A monolithic current-mode CMOS DC-DC converter with on-chip current sensing technique”, IEEE J. Solid-State Circuits, Vol. 39, No.1, pp. 3-14, Jan. 2004.
[14] B. Sahu and G. A. Rincon-Mora, “A high-efficiency, dual-mode, dynamic, buck-boost power supply IC for portable applications,” in Proc.IEEE VLSI Conf., pp. 858-861.Jan. 2005.
[15] H. C. Lee, K. T. Chang, K. H. Chen, and W. T. Chen, “Power savingof a dynamic width controller for a monolithic current-mode CMOSDC-DC converter,” in Proc. IWSOC , pp. 352–357. July. 2005.
[16] Z. Zhang, “Buck converter control cookbook,” Alpha & Omega Semiconductor Inc., Application notes, Aug. 2008.
[17] R.B. Ridley, “A new continuous-time model for current-mode control,” IEEE Trans.s on Power Electronics, pp. 271-280, April, 1991.
[18] D. A. Johns and K. Martin, Analog Integrated Circuit Design, John Wiley & Sons, Inc., 1997.
[19] B. Razavi, Design of analog CMOS integrated circuits, McGraw-Hill Inc., 2001.
[20] K.N. Leung and P.K.T. Mok, “A Sub-1-V 15-ppm/℃ CMOS bandgap voltage reference without requiring low threshold voltage device,’’ IEEE J. Solid- State Circuits, Vol 37, pp.526-530, April. 2002.
[21] S. L. Chung and R. M. Weng, “1.5V continuous-tracking current sensing circuit with high accuracy for DC-DC buck converter,’’ Next-Generation Electronics (ISNE), 2010 International Symposium on, pp.147, Nov.2010.
[22] C.Y. Wang, “A current-mode buck regulator with an adjusted-slope compensation ramp,” NCKU MS Thesis, Department of Electrical Engineering, National Cheng-Kung University, 2005.
[23] P. Y. Wu, S.Y.S. Tsui, and P.K.T. Mok, “Area- and power-efficient monolithic buck converters with pseudo-type III compensation, ’’ IEEE J. Solid-State Circuits, vol.45, no.8, pp.1446-1455, Aug. 2010.
[24] H. W. Huang, K. H. Chen, and S. Y. Kuo, “ Dithering skip modulation,width and dead time controllers in highly efficient DC-DC converters for system-on-chip applications, ’’ IEEE J. Solid-State Circuits, vol.42, no.11, pp.2451-2465, Nov. 2007.

指導教授

魏慶隆(Chin-Long Wey)

審核日期

2011-8-25

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