高功率微波開關及可調頻段濾波器

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姓名

蕭宇植(Yu-Chih Hsiao) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

高功率微波開關及可調頻段濾波器

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摘要(中)

由於CMOS製程擁有低成本及高度積體化的優點，即便其具有崩潰電壓低及基板絕緣性差等缺點。此論文首先利用基底浮接技術、前饋電容技術、電晶體疊接技術及降低基板電阻技術來設計改善微波開關植入損耗及功率承載能力。再考慮基底及基板效應的模型來幫助提升模擬的準確性，成功的設計出一操作頻率在1.9 GHz下的高功率微波開關。
此外並利用CMOS製程完成一具有高功率承載能力之可調頻寬低通濾波器，利用閘極偏壓來改變電晶體的工作狀態，搭配電容來設計出一具新穎性架構的可變式電容。利用模型模擬其是否能夠承受大功率的操作，搭配電感設計出一可調式低通濾波器，其具有34 dBm的功率承載能力。利用頻率響應的轉換，可以將此低通濾波器轉為帶通濾波器。此帶通濾波器具有大於36 dBm的功率承載能力及62 %的調變比例(tuning ratio)。
最後使用氮化鎵製程來實現一具有高功率承載能力且結構簡單的可調低通濾波器，設計乃藉由串聯形式及並聯形式的可變式電容搭配串聯電感而成，在2 GHz的操作頻率下具有大於36 dBm功率承載能力且低植入損耗的可調頻寬之帶通濾波器。

摘要(英)

The circuits based on CMOS technology achieve the advantages of low cost and high integration capability. However, because of low breakdown voltage and poor substrate insulation, it is difficult to design the high power circuits. This research employs body-floating technique, feed-forward capacitor technique, multi-stacked FET and low-substrate resistance technique to improve the RF switch’s insertion loss and power-handling capability. In order to improve CMOS models in high-power applications, this research modify the commercial BSIM3 model to consider the effects from body and substrate. So that, the high power T/R switch operating at 1.9 GHz can be designed and realized.
In addition, the high power tunable low-pass filter is designed by using CMOS technology and by controlling the gate voltage to change the state of the transistor and combining the capacitor to design the switched capacitor. At first, power-handling capability of the switched capacitor is simulated then combines the inductor to achieve the tunable low-pass filter for a 34 dBm power handling capability. Next, the tunable low-pass filter is turned into band-pass filter. This tunable band-pass filter’s power handling capability is greater than 36 dBm with tuning ratio of 62%.
Finally, a high power tunable filter is further designed by using 0.5 μm GaN on silicon process. The tunable low pass filters are constituted by shunt type switched capacitor and series type capacitor respectively. When operating at 2 GHz, the power-handling is greater than 36 dBm with very low insertion loss.

關鍵字(中)

★ 微波開關
★ 高頻
★ 高功率

關鍵字(英)

論文目次

摘要 I
Abstract II
致謝 III
目錄 IV
圖目錄 VI
表目錄 XI
第一章導論 1
1.1 研究動機 1
1.2 微波開關相關研究發展 2
1.3 可變式電容相關研究發展 3
1.4 章節簡述 4
第二章 1.9 GHz 高功率CMOS 微波開關電路 5
2.1 簡介 5
2.2高功率量測系統架構 6
2.3高功率CMOS 微波開關電路 8
2.3.1 常見高功率微波開關架構 8
2.3.2 常見高功率微波開關電路設計技巧 11
2.3.2.1 基底浮接技術 11
2.3.2.2 外加偏壓技術 12
2.3.2.3 降低基板電阻技術 13
2.3.3 CMOS 元件模型改善 14
2.3.4 利用元件模型及測試元件進行降低基板電阻技術之驗證 21
2.3.5 高功率微波開關設計 30
2.3.6 量測結果 33
2.4 結論 38
第三章高功率CMOS 微波可調頻段濾波器設計 39
3.1 簡介 39
3.2 具高功率乘載能力之可變式電容 40
3.2.1 具高功率乘載能力之可變式電容基本架構 40
3.2.2 利用電晶體疊接技術及前饋電容技術提升電晶體可承受之功率 42
3.3 具高功率承載能力可調式低通濾波器設計 44
3.3.1 可變式電容電容值計算及其對功率承載能力之影響 45
3.3.2 低通濾波器架構簡介 49
3.3.3 模擬與量測結果 51
3.4 具高功率承載能力可調式帶通濾波器設計考量 58
3.4.1 低通濾波器轉換帶通濾波器之方法 58
3.4.2 低通濾波器轉換帶通濾波器 61
3.4.3 模擬與量測結果 63
3.5 結論 66
第四章高功率氮化鎵可調頻段低通濾波器設計 67
4.1 簡介 67
4.2 氮化鎵可變式電容介紹 67
4.2.1 氮化鎵磊晶結構介紹 67
4.2.2 並聯式可變式電容架構介紹 68
4.2.3 串聯式可變式電容架構介紹 70
4.3 氮化鎵低通濾波器介紹 73
4.3.1 氮化鎵低通濾波器架構 73
4.3.2 氮化鎵低通濾波器模擬及量測結果 76
4.3.2.1 搭配並聯式可變式電容之氮化鎵低通濾波器模擬及量測結果 76
4.3.2.2 搭配串聯式可變式電容之氮化鎵低通濾波器模擬及量測結果 78
4.4 結論 82
第五章結論 83
參考文獻 84

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指導教授

辛裕明

審核日期

2013-7-31

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