Chirp視覺誘發電位為基礎之大腦人機介面 - FPGA實現

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姓名

彭韶驊(Shao-hwa Peng) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

Chirp視覺誘發電位為基礎之大腦人機介面 - FPGA實現
(Chirp-VEP Based BCI system – FPGA Implementation)

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摘要(中)

本論文之主軸是將chirp 信號及分數傅立葉轉換實現於FPGA，並將此
技術應用於大腦人機介面上，即Chirp 視覺誘發電位為基礎之大腦人機介面。
若想將chirp 信號及分數傅立葉轉換完美之實現於FPGA，需要耗費相當大
之記憶體，此將使成本提高。因此本篇提出了chirp 信號之分段差分最佳化
近似，以及分數傅立葉轉換之泰勒展開式近似，來分別將其實現於FPGA。
傳統以穩態視覺誘發電位為基礎之大腦人機介面，其刺激源皆為定頻訊號，
可控制刺激源數量之參數除了有限之頻帶，只有相位一種。且自然環境較
容易出現定頻雜訊，因此系統之訊雜比將會較容易受到影響。而Chirp
視覺誘發電位為基礎之大腦人機介面將可解決以上問題，控制刺激源數量
之參數變為刺激時間、頻率變化率與起始頻率三樣，且因為自然界幾乎不
會出現固定頻率變化率之雜訊，因此對於系統之SNR 將會有所改善。

摘要(英)

This study implements Chirp signal and Fractional Fourier Transform in
FPGA, and the technique is applied to the BCI system, and it’s called
Chirp-VEP Based BCI System. If we want to implement Chirp signal and
Fractional Fourier Transform perfectly in FPGA, it will take a sizeable memory
and increase the cost. Therefore, this paper proposes Piecewise Differential
Optimized Approximation for Chirp signal, and the Taylor Series Approximation
for Fractional Fourier Transform to implement in FPGA. The signal source of
stimulation are all fixed-frequency on the traditional SSVEP Based BCI system,
in addition to limited bandwidth, only phase which are controllable parameters
of the number of signal source, and the general environment often exists
fixed-frequency noise, so the system SNR will be more susceptible. The
Chirp-VEP Based BCI System will resolve the above problem. The numbers of
controllable parameter of signal source are stimulation time, chirp rate, and
initial frequency; it’s more than traditional SSVEP Based BCI system. There is
almost no fixed rate of change of frequency in general environment, so the SNR
for the system will be improved.

關鍵字(中)

★ Chirp 信號
★ 分數傅立葉轉換
★ 大腦人機介面
★ 穩態視覺誘發電位
★ Chirp 視覺誘發電位

關鍵字(英)

★ Chirp signal
★ Fractional Fourier Transform
★ BCI
★ SSVEP
★ Chirp-VEP

論文目次

摘要 .................................................. I
ABSTRACT .............................................. II
誌謝 .................................................. III
目錄 .................................................. IV
圖目錄 ................................................ VI
表目錄 ................................................ VIII
第一章緒論 ........................................... 1
2-1 前言 .............................................. 1
2-2 研究背景 .......................................... 2
2-3 研究目的與方法 .................................... 4
2-4 論文架構 .......................................... 5
第二章分數傅立葉轉換介紹 ............................. 6
3-1 FRFT 介紹 ......................................... 6
3-2 FRFT 之相關性質定理 ............................... 8
第三章 CHIRP 信號之數位化及分析 ....................... 18
4-1 CHIRP 信號之數位化公式推導 ........................ 18
4-2 分段差分近似法 .................................... 20
4-2-1 單段差分一次近似法 .............................. 20
4-2-2 單段差分二次近似法 .............................. 21
4-2-3 橫軸多段差分一次近似法 .......................... 24
4-2-4 橫軸多段差分二次近似法 .......................... 25
4-2-5 橫軸/縱軸多段差分二次近似法之比較 ............... 26
4-3 不同頻率變化率下分段數之誤差比較與最佳化近似法 .... 29
4-3-1 一點/二點近似 & 不同頻率變化率下分段數之誤差比較 . 29
4-3-2 縱軸四段差分二次之最佳化近似法 .................. 30
第四章數位訊號系統之硬體實現 ......................... 34
5-1 系統架構與FPGA 核心 ............................... 34
5-2 周邊應用電路及雜訊去除之訊號處理 .................. 36
5-2-1 類比/數位與數位/類比轉換器 ...................... 36
5-2-2 雜訊去除之訊號處理 .............................. 37
5-3 分數傅立葉轉換之實現 .............................. 39
5-3-1 泰勒定理 ........................................ 39
5-3-2 分數傅立葉轉換之泰勒展開式 ...................... 40
5-3-3 分數傅立葉轉換於FPGA 之實現流程 ................. 41
5-4 系統模擬驗證 ...................................... 47
第五章實驗數據分析 ................................... 53
6-1 刺激信號之基本分析 ................................ 53
6-2 視覺誘發電位之比較與分析 .......................... 58
6-3 大腦人機介面系統實驗與分析 ........................ 64
第六章結論與未來展望 ................................. 67
參考文獻 .............................................. 69

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指導教授

徐國鎧(Kuo-Kai Shyu)

審核日期

2013-8-5

推文