| DC 欄位 |
值 |
語言 |
| DC.contributor | 化學工程與材料工程學系 | zh_TW |
| DC.creator | 林伯誠 | zh_TW |
| DC.creator | Bo-Cheng Lin | en_US |
| dc.date.accessioned | 2017-8-22T07:39:07Z | |
| dc.date.available | 2017-8-22T07:39:07Z | |
| dc.date.issued | 2017 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:444/thesis/view_etd.asp?URN=101324057 | |
| dc.contributor.department | 化學工程與材料工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 本研究以氧化鋅奈米柱為主軸，分別探討以水熱法合成規則排列、準直的氧化鋅奈米柱陣列的最佳參數，以及將此具有高深寬比的氧化鋅奈米柱陣列，利用原子層沉積技術(ALD)在其上鍍製高品質的氧化鋅摻鋁(AZO)及介電層氧化鋁(Al2O3)薄膜，並探討其在電容性質的強化應用。第一部份是利用水熱法的方式在預鍍AZO晶種層的[0001]藍寶石基板上，藉由聚苯乙烯微球(PS microspheres)能自組裝成最密堆積排列的特性，作為遮罩以控制氧化鋅奈米柱的成長位置。此方法能快速並以簡單的方式製作大面積、高規則排列及具有[0001]優選方向的奈米柱陣列，且由-scan結果顯示氧化鋅奈米柱為六軸對稱且和AZO晶種層及藍寶石基板有磊晶關係。由於在水熱法合成氧化鋅奈米柱過程，氧化鋅的形貌對於成長環境的前驅物濃度、pH值及反應時間有高敏感度的影響，故本實驗探討藉由調整水熱法的三個變因：濃度、pH值及反應時間來尋找在PS球間成長單一根奈米柱的最佳條件，其中影響形貌的因素和氧化鋅對於基板的磊晶行為也在文中討論。
第二部份則是將最佳條件的氧化鋅奈米柱陣列作為模具，利用原子層沉積技術具有大面積、高階梯覆蓋率、高厚度均勻性、低溫製程及原子級膜厚控制等優點，將三層堆疊薄膜結構(AZO/Al2O3/AZO)及五層堆疊薄膜結構(AZO/ZnO/Al2O3/ZnO/AZO)分別鍍製在氧化鋅奈米柱陣列上做成金屬-介電層-金屬結構(MIM)奈米電容，其中低溫鍍製的非晶氧化鋁介電層因為使用ALD方式而具有高介電特性。電容對電壓量測結果顯示等效電容增益和氧化鋅奈米柱所提供顯著表面積成正比，對應薄膜電容器多出2.3倍的容值。而在加入兩層氧化鋅薄膜的五層電容結構中，則因為氧化鋅薄膜中的缺陷在充電狀況下能作為載子捕捉的陷阱，相對於三層電容結構進而提高了7.5倍的等效電容增益。此結果表示，利用高深寬比的氧化鋅奈米柱陣列作為模具加上氧化鋅薄膜的缺陷效應，可以有效提升電容密度，並能應用於需要高表面積的元件。 | zh_TW |
| dc.description.abstract |
Through a simple hydrothermal method, well-aligned and periodic honeycomb-like ZnO nanorod arrays were fabricated on a c-plane sapphire with an aluminum-doped ZnO (AZO) seed layer. The optimal growth conditions allowed the growth of a single rod in the confined space between the microspheres. A -scan analysis showed that the rod exhibited six-fold symmetry, which indicates a favorable epitaxial relationship between the ZnO nanorods, seed layer, and c-plane sapphire substrate. The epitaxial relation is as follows: [0001]ZnO∥[0001]AZO∥[0001]c-plane sapphire. The size of the resulting ZnO nanorods of diameter 20–90 nm could be tuned by varying the concentration of the solution, pH, and duration of the reaction. The large aspect ratio for the ZnO nanorod arrays can serve as a template for high surface-area nanocapacitor applications.
A flow-rate interruption (FRI) atomic-layer deposition (ALD) technique was adopted to fabricate a 3-layers (AZO/Al2O3/AZO) and a 5-layers (AZO/ZnO/Al2O3/ZnO/AZO) thin-film multiple metal-insulator-metal (MIM) on a ZnO arrayed template at low temperature. The high-quality amorphous dielectric Al2O3 layer was deposited at 50°C. The capacitance density of the arrayed template nanocapacitor increased more than 100% than those of the thin-film capacitor at an applied frequency of 10 kHz. Moreover, the ZnO layers with different growing temperature were inserted into the 5-layers MIM capacitors to enhance the charge trapping capability with an increasing equivalent capacitance density of ~47 nF/cm2. The equivalent capacitance density is 7.5 times higher than those without the ZnO layers insertion. It is believed that the defects in the ZnO layer served as trapping states to capture the carriers when charged and enhance the capacitance. This study provides a concept for increasing energy storage capability by utilizing the high surface-area nanostructure and the defects of the ZnO material. | en_US |
| DC.subject | 原子層沉積法 | zh_TW |
| DC.subject | 氧化鋅 | zh_TW |
| DC.subject | 電容器 | zh_TW |
| DC.subject | Atomic layer deposition | en_US |
| DC.subject | ZnO | en_US |
| DC.subject | capacitor | en_US |
| DC.title | 原子層沉積成長氧化物薄膜應用於氧化鋅奈米柱陣列電容器 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | ZnO Nanorod Arrays Coated with Oxide Thin Film by Atomic Layer Deposition for Nanocapacitor Application | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |