| dc.description.abstract | As more increasing demands for low-cost in wireless communication system, multi-standards circuits are proposed to support the requirements. Therefore, RF transceivers become more complex and consume more power to satisfy the different wireless systems, which means that various kinds of local sources are needed meanwhile. Since voltage controlled oscillator (VCO) is an important sub-circuit in phase locked loop (PLL), this thesis includes five parts, which are motivation, two VCOs for dual-band application, integrated circuits for 5GHz and future work.
Chapter 1 illustrates the motivation of the system standards. And chapter 2 introduces the basic theory of transformer and implements a transformer-switch based VCO for dual-band and wideband application fabricated in 0.18-μm CMOS technology. This design uses the transformer not only for reducing the chip size, but also enabling the center frequency tunable monotonically. By setting the different bias, the circuit can be operated as dual-band or wideband. The measured tunable oscillation frequency is from 5.55 GHz to 10.26 GHz. The power consumption is 3.2 mW and the phase noise is -105.71 dBc/Hz at 1-MHz offset respectively. The obtained FoMT is -192.18. The chip area, including RF signal pads and DC bias pads, is 0.752 × 0.8 mm2.
Chapter 3 presents a Colpitts with current-reused technology. The Colpitts current-reused VCO fabricated in 0.18-μm CMOS technology with magnetically coupled switch. The design procedure and measurements are described in this chapter. This circuit adopts the source degeneration inductor to extend the tuning range and eases the design of DC bias simultaneously. The measured center frequencies for each sub-band are 5.36 GHz and 10.95 GHz with tunable from 5.24 GHz to 5.48 GHz and 10.4 GHz to 11.5 GHz. The phase noise are -114.9 and -105.35 dBc/Hz, respectively. The total power consumption is 1.95 mW. The FoM are -185.1 and -183.38, respectively. The chip area, including RF signal pads and DC bias pads, is 0.842 × 0.732 mm2.
Chapter 4 then reviews the conventional design of frequency dividers. A VCO is integrated with frequency divider in this chapter. The oscillator can be tuned from 4.68 GHz to 6.19 GHz, the corresponding output frequency of divider is 2.34 GHz to 3.1 GHz. The power consumptions are 2.52 and 3.75 mW. The phase noise are -117.1 and -122.3 dBc/Hz respectively. The chip area, including RF signal pads and DC bias pads, is 0.73 × 1.16 mm2.
Chapter 5 concludes the aforementioned three designs and brings up the future work in the end of the thesis.
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