博碩士論文 106521103 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator蔡智斌zh_TW
DC.creatorJhih-Bin Caien_US
dc.date.accessioned2020-7-21T07:39:07Z
dc.date.available2020-7-21T07:39:07Z
dc.date.issued2020
dc.identifier.urihttp://ir.lib.ncu.edu.tw:444/thesis/view_etd.asp?URN=106521103
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract本論文主要研究為微波及毫米波前端收發機電路中輻射計接收機及功率放大器。其中,輻射計接收機包含兩個子電路,分別為低雜訊放大器及功率偵測器。 第二章提出了一個使用台積電90 nm CMOS製程操作於Ka頻段低雜訊放大器,作為輻射計接收機之前級放大器,以提高整體系統靈敏度。為達到低雜訊且高增益特性,使用源極退化電感並且以三級疊接架構實現。電路最大增益達到14.2 dB,3 dB頻寬為32至41 GHz,在33.5 GHz有最小值雜訊指數為5 dB。晶片面積為0.9 × 0.77 mm2。 第三章提出了一個使用台積電90 nm CMOS製程操作於Ka頻段功率偵測器,作為輻射計接收機中一個子電路。為改善功率偵測器之響應度及雜訊等效功率,本次設計採用差動對架構實現。差動對架構所需差動訊號,因此於前級加入一個主動式平衡轉不平衡器。量測結果在33 GHz有最大響應度(RV)為45 kV/W與最小雜訊等效功率(NEP)為144 fW/√("Hz" ),晶片面積為0.8 × 0.75 mm2。 第四章提出了一個使用台積電90 nm CMOS製程操作於Ka頻段輻射計接收機,本章節整合了低雜訊放大器及功率偵測器。改良低雜訊放大器後,與功率偵測器整合。量測結果在34 GHz有最大響應度(RV)為4.5 MV/W與最小雜訊等效功率(NEP)為3.6 fW/√("Hz" ),晶片面積為1.54 × 0.76 mm2。 第五章提出了一個使用穩懋0.25 μm GaN製程操作於Ku頻段Doherty功率放大器,功率放大器在發射機系統中為一個關鍵電路,為改善功率放大器之回退6 dB功率增進效益(PAE),本次設計採用Doherty架構。量測結果在14 GHz有最大功率增益為5 dB,輸出飽和功率(PSAT)為30 dBm,功率增進效益(PAE)為16%,晶片面積為1.5 × 2 mm2。 最後,於第六章提出本論文總結與未來研究方向。zh_TW
dc.description.abstractIn this thesis, a radiometer receiver and a power amplifier in microwave and millimeter-wave front-end transceiver are presented. The radiometer receiver includes two block, low noise amplifier (LNA) and power detector. In chapter 2, a Ka-band low noise amplifier using TSMC 90 nm process is presented as a pre-amplifier for radiometer receiver to improve the system sensitivity. To achieve low noise and high gain, inductive source degeneration and three-stage cascode architecture are used. The measured small signal gain is 14.2 dB with 3-dB bandwidth from 32 to 41 GHz, and minimum noise figure of 5 dB at 33.5 GHz. The chip size of the LNA is 0.9 × 0.77 mm2. In chapter 3, a Ka-band power detector using TSMC 90 nm process is presented as a block for radiometer receiver. To improve the power detector responsivity (RV) and noise equivalent power (NEP), differential pair architecture is used. The active balun is used to provide the differential signal to the input of the power detector. The power detector has a measured peak responsivity of 45 kV/W and a noise equivalent power of 144 fW/√("Hz" ). The chip size of the power detector is 0.8 × 0.75 mm2. In chapter 4, a Ka-band radiometer receiver using TSMC 90 nm process is presented. The improved LNA and the power detector are integrated in this chapter. The radiometer receiver has a measured peak responsivity of 4.5 MV/W and a noise equivalent power of 3.6 fW/√("Hz" ). The chip size of the power detector is 1.54 × 0.76 mm2. In chapter 5, a Ku-band Doherty power amplifier using WIN 0.25 μm GaN process is presented. The power amplifier is a crucial block in the transmitter system. To improve the 6-dB power back-off efficiency, the Doherty architecture is used. The measured small signal gain is 5 dB at 14 GHz. The proposed PA achieves 30 dBm saturated output power with 16% power added efficiency (PAE) at 14 GHz. The chip size of the power amplifier is 1.5 × 2 mm2. In chapter 6, the conclusion and future works are presented.en_US
DC.subject低雜訊放大器zh_TW
DC.subject功率偵測器zh_TW
DC.subject輻射計接收機zh_TW
DC.subject功率放大器zh_TW
DC.subject氮化鎵zh_TW
DC.subjectLow noise amplifieren_US
DC.subjectPower detectoren_US
DC.subjectRadiometer receiveren_US
DC.subjectPower amplifieren_US
DC.subjectGaNen_US
DC.subjectCMOSen_US
DC.titleKa頻段輻射計接收機暨Ku頻段氮化鎵功率放大器之研製zh_TW
dc.language.isozh-TWzh-TW
DC.titleDesign of Ka-band Radiometer Receiver and Ku-band GaN Power Amplifieren_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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