| dc.description.abstract | The thesis presented a few high-performance IQ modulators for high-speed and millimeter-wave (mm-wave) applications. An I/Q modulator integrated with a sub-harmonic injection-locked frequency-locked loop and high-performance anti-series BPSK and quadrature reflection-type modulators are proposed using some advance CMOS and GaAs processes. A Ka-Band sub-harmonic injection-locked quadrature voltage-controlled oscillator (SILQVCO) is presented in Chapter 2 using TSMC 0.18 μm CMOS process. A stack-boosting technique is employed in the cross-coupled core to further enhance the negative resistance and overcome the limitation of the CMOS process. In addition, a quadrature dual-injection technique is used to reduce the phase noise and the quadrature error. The maximum operation frequency of the proposed SILQVCO is up to 27.9 GHz. The tuning range is from 26.2 to 27.9 GHz with a fractional bandwidth of 6.4%. The highest output power is -13 dBm. Under the free-running condition, the measured lowest phase noise at 1-MHz offset frequency is -91.7 dBc/Hz. Under the injection-locked condition, the measured lowest phase noise at 1-MHz offset frequency is -122.5 dBc/Hz with a state-of-the-art figure-of-merit (FoMPN) of -195.2. Moreover, the measured phase error and amplitude error are 1.05˚ and 0.21 dB, respectively. The core DC power consumption without the buffers is 36.55 mW. The chip size, including RF and DC pads, is 1.005×1.155 mm2.
In Chapter 3, a Ka-Band low-phase noise and low-jitter sub-harmonic injection-locked frequency-locked loop (SILFLL) IQ modulator is proposed using TSMC 0.18 μm CMOS process. The stack-boosting and quadrature dual-injection techniques are both adopted to enhance the maximum frequency and reduce phase noise and the quadrature error. The measured highest frequency of the proposed circuit is up to 28.2 GHz. The measured lowest rms jitter is 46.9 fs. As can be observed, the frequency-tracking loop (FTL) can be employed to adaptively tuning the controlled voltage to resist the process, voltage, and temperature variations, and the measured SILFLL frequency is from 26.5 to 28.2 GHz. The measured output injection-locked frequency range is 1.7 GHz with a fractional bandwidth of 6.2%. The measured highest output power is -12.2 dBm. Under the injection-locked condition, the measured lowest phase noise at 1-MHz offset frequency is -122 dBc/Hz with a lowest FoMPN of -195. The proposed injection-locked quadrature modulator features low insertion loss, low dc power consumption, and low circuit complexity. The measured single sideband and LO suppressions are better than -30.5 and -24.3 dBc, respectively. The digital modulation scheme is successfully performed up to 64-QAM with a 1-Mbps symbol rate. The measured lowest error vector magnitude (EVM) of the 64-QAM modulation is 2.75%. The DC power consumption is 62 mW. The chip size, including RF and DC pads, is 1.23×1.46 mm2.
In Chapter 4, several mm-wave conventional modified and proposed anti-series diode reflection-type modulators, including the conventional modified reflection-type and anti-series diode BPSK modulators, the conventional modified reflection-type and anti-series diode IQ modulators, are presented using GaAs PIN diode process provided by WIN Semiconductors Corporation. The principle of the reflection-type modulator is introduced, and the mathematical models of the conventional modified reflection-type and the proposed modulators are presented to verify the linearity of the modulators. The high-order derivations of the transmission coefficients versus diode bias for the modulators are presented to evaluate the intermodulation distortion of the conventional modified reflection-type and the proposed anti-series diode modulators. The measured results of the high-order intermodulation suppressions show good agreement with the theoretical results. As compared with the conventional modulator, the proposed anti-series diode modulator exhibits high linearity and good intermodulation suppression, and also it is suitable for high-level modulation schemes. As the symbol rate is 1 Mbps, the measured EVMs of the BPSK modulation for the conventional and the proposed BPSK modulators are 1.22% and 0.37%, respectively. As the symbol rate is 1 Mbps with 64-QAM modulation, the measured EVM of the conventional IQ modulators is 3.37%. As the symbol rate is 1 Mbps with 256-QAM modulation, the measured EVMs of the proposed IQ modulators are 1.18%, respectively. Under the IEEE 802.11a wireless communication standard with a bit rate of 54 Mbps, the measured EVMs of 64-QAM orthogonal frequency division multiplexing (OFDM) modulation for the conventional and the proposed IQ modulators are -22.5 and -31.25 dB, respectively. | en_US |