| dc.description.abstract | In this thesis, a Q-band low-noise amplifiers (LNAs), wideband mixers, and W-band LNA with downconverters using CMOS process technology. In Chapter 2, a Q-band LNA using TSMC 0.18 μm CMOS process is presented as a pre-amplifier for radiometer receiver to achieve low noise and high gain characteristics, a five-stage architecture is used. The measured small signal gain is 16.4 dB with 3-dB bandwidth from 35.7 to 41.7 GHz, and minimum noise figure of 7.3 dB at 39 GHz. An output 1-dB compression power of 3 dBm and an IIP3 of -3 dBm. The total dc power consumption of 73 mW. The chip size of the LNA is 0.8 × 0.7 mm2.
In Chapter 3, a Q-band mixer is realized TSMC 0.18 μm CMOS process. The circuit adopts a Darlington mixing cell with LO source-pumped architecture to achieve optimal conversion gain. Different mixer core circuit architectures and transistor sizes are analyzed for performance optimization. a Marchand Balun is designed at the input of the RF port to enhance isolation from LO port to RF port, the length of the compensated line and couple line in Marchand Balun are further analyzed and discussed in this chapter. While the LO power is 5 dBm, the mixer achieves a conversion gain of -12.5 dB. The RF port frequency bandwidth is from 35 to 45 GHz. The isolation from LO port to RF port is 38 dB at 30 GHz. The input 1-dB compression power of 2 dBm with a total dc power consumption of 1 mW, and the chip size is 0.88 × 0.77 mm2.
In Chapter 4, a W-band downconverter using TSMC 90 nm CMOS process. Initially, a W-band low-noise amplifier (LNA) is designed for the front-end of the circuit. However, a single transistor can only provide a gain of 2 dB in the W-band, and the cascade architecture results in excessive noise figure. Therefore, a six-stage common-source architecture is employed to increase the circuit gain and reduce the noise figure. The measured small signal gain is 13 dB and the minimum noise figure of 8 dB at 89 GHz. The total dc power consumption of the circuit is only 10 mW and the chip area of the LNA is 0.73 × 0.81 mm2. Next, the low-noise amplifier is integrated with the mixer to form a low-noise W-band downconverter. While the LO power is 5 dBm, the mixer achieves a conversion gain of 3.3 dB, the minimum noise figure is reduced to 11 dB, and the isolation from LO port to RF port is improved. The total dc power consumption of the circuit is only 15 mW, and the overall chip size is 1.4 × 0.84 mm2. | en_US |