| dc.description.abstract | Ka band (26.5–40 GHz) is currently used in fifth-generation mobile communications. This frequency band has a large bandwidth, higher transmission rate, and lower latency. Whether it is the fifth-generation mobile communications or radar systems, we need phased arrays to sup- port more applications in this frequency band. The phase shifter is one of the most critical circuits in the phase array. By providing an ad- justable phase difference of each antenna in the phased array, we can control transmitting and receiving direction in phased array . The main considerations of the phase shifter are higher phase resolution, band- width, smaller phase error, amplitude error, lower insertion loss, DC power consumption, and chip area . In this thesis, we use TSMC 90-nm CMOS process to achieve fully-differential Ka-band 5-bit CMOS phase shifters using transmission-line-based quasi-all-pass networks.
In Chapter 2, we use the TSMC 90-nm CMOS process to design a Ka-band 5-bit passive phase shifter. The operating frequency of the circuit is 35 GHz. The 11.25◦, 22.5◦, 45◦ and 90◦ phase shifter use transmission line-based quasi all-pass network architecture, and the 180
◦ phase shifter uses SPDT switch architecture. We use Keysight ADS to
simulate circuit and analyze transmission line by electromagnetic sim- ulation. The simulation results show that the RMS phase error is less than 3◦, the corresponding frequency band is 31.8–41.5 GHz, the band- width is 26.46 %, and the input return loss is greater than 19.3 dB, the output return loss is greater than 14.5 dB over all the bandwidth.
Insertion loss is less than 18.4 dB across the bandwidth. The average insertion loss is less than 17.1 dB across the bandwidth. The amplitude errors is smaller than ±1.44 dB, and the worst RMS amplitude error is
0.91 dB. IP1dB is approximately 24–26 dBm at 35 GHz and the chip area is 1× 1.25 mm2. Then we use Keysight N5227B 4-port network analyzer to measure the S parameters. The measurement results show that the phase shift of all states tends to increase and shift to high frequency, and the root mean square phase error also rises to 11.5◦. Therefore, we
redefine the bandwidth as the 27.7–45.2 GHz. In this band, the return loss is greater than 10 dB, the insertion loss is greater than 17.5 dB, and the amplitude error is within ±1.3 dB. In order to improve the measure- ment results to resimulate, We guess that the parasitic inductance on the MIM capacitor model is less than the actual one. Therefore, we se- ries inductor next to the MIM capacitor to make sure that the parasitic inductance of the model is not too different from the actual parasitic inductance. But we can only make the simulation results close to the measurement results by series inductor.
In Chapter 3, we use the TSMC 90-nm CMOS process to design a Ka-band 5-bit passive phase shifter. The operating frequency of the circuit is 35 GHz. The 11.25◦, 22.5◦, 45◦ and 90◦ phase shifter use trans- mission line-based quasi all-pass network architecture, and the 90 ◦ phase shifter uses two stages of transmission line-based quasi all-pass network with different center frequencies. The network is connected in series, and the center frequencies are 22 GHz (LB) and 52 GHz (HB). The 180 ◦ phase shifter uses SPDT switch architecture. We use Keysight
ADS to simulate circuit and analyze transmission line by electromag- netic simulation. The simulation results show that the RMS phase error is less than 3◦, the corresponding frequency band is 29.1–43.3 GHz, the bandwidth is 39.22 %, and the input return loss is greater than 16.8 dB, the output return loss is greater than 12.8 dB over all the bandwidth. Insertion loss is less than 19.6 dB across the bandwidth. The average
insertion loss is less than 19 dB across the bandwidth. The amplitude errors is smaller than ±0.94 dB, and the worst RMS amplitude error is 0.55 dB. IP1dB is approximately 26.4–28.6 dBm at 35 GHz and the chip area is 1.36× 1.25 mm2. Then we use Keysight N5227B 4-port network analyzer to measure the S parameters. The measurement re-
sults show that the phase shift of all states tends to increase and shift to high frequency, and the root mean square phase error also rises to 11.7◦. Therefore, we redefine the bandwidth as the 23.4–48 GHz. In this band, the return loss is greater than 7.7 dB, the insertion loss is greater than
19.1 dB, and the amplitude error is within ±0.75 dB. We guess that the parasitic inductance on the MIM capacitor model is less than the actual one. Therefore, we series inductor next to the MIM capacitor to make sure that the parasitic inductance of the model is not too different from the actual parasitic inductance. Besides, we series inductor and capacitor next to the MIM capacitor to make sure that simulation is close to measurement. Finally, we can only make the simulation results close to the measurement results by series inductor.
In this paper, we have successfully implemented Fully-Differential Ka-band 5-Bit CMOS Phase Shifters. Although the measurement re- sults are quite different from the simulation results, after resimulating, we can know the effects of this process in the Ka band. After considering these effects, the results can be closer to our expected performance.
| en_US |