| dc.description.abstract | The epitaxial layer used in the 1200 V device was grown on a low-resistivity silicon substrate
with a p-GaN layer on top of the AlGaN/GaN heterostructure. To achieve a 1200 V blocking
voltage and mitigate the lattice mismatch issue between GaN and silicon, a 6.5 μm thick
buffer layer with carbon doping was used in the epitaxial structure to enhance vertical
insulation. Enhancement-mode AlGaN/GaN high-electron-mobility transistors (HEMTs)
were fabricated on this epitaxial structure, including both conventional p-GaN gate HEMTs
and p-GaN gate HEMTs with a source field plate (SFP). Electric field analysis of devices
with and without SFP was performed using Silvaco TCAD simulation.
In the grounded substrate off-state blocking voltage measurement, the conventional p-GaN
gate HEMT (LGD = 20 μm) exhibited a blocking voltage of 1755 V at a drain leakage current
of 1 mA/mm, while the device with SFP showed a blocking voltage of 1759 V with RON,sp
values of 7.57 mΩ·cm2
and 7.89 mΩ·cm2
, respectively. Analysis of different leakage
currents revealed that the primary limitation on blocking voltage came from the vertical
substrate (Isub) leakage current. Thus, the source field plate structure, designed to disperse
the gate edge electric field, did not improve the blocking voltage. However, in the floating
substrate off-state blocking voltage measurement, the conventional p-GaN gate HEMT
achieved a blocking voltage of 1622 V at a drain leakage current of 1 mA/mm, while the
device with SFP reached 1962 V. Leakage current analysis indicated that blocking was
predominantly influenced by the gate (IG) leakage current, and the device with the source
field plate exhibited improved blocking voltage. The analysis identified gate leakage current
as the main drawback in the fabricated devices.
Finally, an analysis of the constituent components of specific on-resistance was conducted,
considering current leakage, Ohmic contact resistance, sheet resistance, and gate-to-drain
distance adjustments based on current process technology. By shortening the gate-to-drain
distance in devices dominated by gate leakage current (LG = 2 μm, Lp-GaN = 4 μm, LGS = 3
μm, LGD = 11 μm, and leakage current defining 1 μA/mm), the specific on-resistance (RON,sp)
decreased to 1.35 mΩ·cm2
. This suggests that the 1200 V device can achieve world-class
performance. | en_US |