| dc.description.abstract | This thesis introduces the design of a complementary metal-oxide-semiconductor (CMOS) stacked power amplifier tailored for the n77-n79 frequency bands, integrating a unified ColdFET linearization circuit. The implementation utilizes Taiwan Semiconductor Manufacturing Company′s (tsmc™) 018-µm CMOS process. Furthermore, it presents a 25% duty cycle I/Q
transmitter intended for the n79 frequency band.
The first chip demonstrates a CMOS power amplifier for the n77-n79 frequency bands, which employed a stacked architecture to overcome inherent limitations in the CMOS process, such as the low breakdown voltage and high knee voltage of the transistors. This configuration significantly enhances the overall circuit output power.
Notably, a symmetrically coupledresonator transformer is incorporated for circuit matching, enabling broadband performance. Integration of a Cold-FET linearization circuit before the driver amplifier facilitates gain expansion, reducing the gap between the output 1-dB gain compression point power and the output saturation power. Operating within the bandwidth of 2.9 - 5 GHz, the chip achieves a
maximum gain of 21.8 dB, a maximum output power of 27.24 dBm, a 1-dB gain compression point output power of 26.72 dBm and a peak power added efficiency of 25.57% as post linearizer activation. The chip′s physical footprint measures 3.69 mm² (2.7 mm × 1.37 mm).
The second chip focuses on a 25% duty cycle I/Q transmitter circuit tailored for the n79 frequency band. The local oscillator port employs a current-mode logic divider followed by a iii square wave buffer to generate quadrature-phase signals. The mixed signal, achieved through direct combination in the I/Q path, produces the upper sideband frequency. Operating within the range of 3 - 4.3 GHz with an optimal local oscillator drive signal of 6 dBm, this chip achieves a maximum conversion gain of 8.6 dB, a 1-dB gain compression point output power of 4.61 dBm, and a third-order intercept point of 8.92 dBm. Impressively, the transmitter demonstrates excellent carrier suppression of 45.3 dBc and sideband suppression of 44.6 dBc.The chip occupies an area of 1.59 mm² (1.6 mm × 0.98 mm). | en_US |