博碩士論文 110521173 完整後設資料紀錄

DC 欄位 語言
DC.contributor電機工程學系zh_TW
DC.creator蘇昱嘉zh_TW
DC.creatorYu-Chia Suen_US
dc.date.accessioned2024-8-13T07:39:07Z
dc.date.available2024-8-13T07:39:07Z
dc.date.issued2024
dc.identifier.urihttp://ir.lib.ncu.edu.tw:444/thesis/view_etd.asp?URN=110521173
dc.contributor.department電機工程學系zh_TW
DC.description國立中央大學zh_TW
DC.descriptionNational Central Universityen_US
dc.description.abstract在本論文中展示了多個微波及毫米波電路,包含一個以 Rogers4003C-FR4 混合的四 層印刷電路板(PCB)製程實現的 Ku 頻段瓦特級功率放大器模組、一個使用穩懋 E-mode GaAs 0.15-µm PIN-HEMT 製程的 Ka 頻段低雜訊放大器(LNA)、一個使用台積電 90 奈 米 CMOS 製程的 Ka 頻段低雜訊放大器(LNA)、以及一個使用台積電 90 奈米 CMOS 製 程的無切換器輻射接收機。 在第二章中,設計了一個以 Rogers4003C-FR4 混合的四層印刷電路板(PCB)製程 實現的 Ku 頻段瓦特級功率放大器模組。此功率放大器模組實現了最高 25 dB 的小訊號 增益,3-dB 頻寬範圍為 14.3 至 18.7 GHz。該功率放大器模組還實現了 2 dBm 的輸入 1- dB 增益壓縮點、最高 12.3%的功率附加效率(PAE)以及 32 dBm 的輸出飽和功率。此 外,本章還提出了使用單偏壓技術的功率放大器模組,以化簡系統的複雜性。採用單偏 壓的功率放大器模組在小訊號及大訊號特性上能保持與原始多偏壓設計性能近乎相同。 在第三章中,提出了一個使用穩懋 E-mode GaAs 0.15-µm PIN-HEMT 製程並採用電 阻-電感-電容回授技術的 Ka 頻段低雜訊放大器。通過使用疊接結構和電阻-電感-電容回 授技術,在保持高增益和寬頻的同時,解決了疊接架構穩定度的問題。此低雜訊放大器 在 31.2 GHz 頻率下有最高的小訊號增益 22.9 dB,並在 29 GHz 的頻率下實現了最低的 雜訊指數 2.7 dB。此低雜訊放大器還實現了-5 dBm 的輸入三階截點(IP3)和 17 dBm 的 輸出三階截點(IP3)。整體電路晶片面積為 1.05 mm2。 在第四章中,提出了一個使用台積電 90 奈米 CMOS 製程且基於電流再利用架構及 變壓器耦合的 Ka 頻段低雜訊放大器,並採用了正偏壓基體偏壓技術。使用互感係數為 0.3 的中心抽頭變壓器來提高小訊號增益,此變壓器用於第一級電路的汲極和第二級電 路的源極。該低雜訊放大器在 25.3 GHz 頻率下實現了最高 12 dB 的小訊號增益,3-dB 頻寬範圍為 22.7 至 30.7 GHz。該雜訊放大器在 25 GHz 頻率下實現了最低 3.5 dB 的雜 訊指數。此外,正偏壓基體偏壓技術被用來提升低雜訊放大器的線性度,並且實現了 5.1 ii dBm 的輸入三階截斷點(IIP3)和 17.3 dBm 的輸出三階截斷點(OIP3)。此低雜訊放大 器的整體電路晶片面積為 0.49 mm2。 在第五章中,提出了一個使用台積電 90 奈米 CMOS 製程的無切換器輻射接收機。 此輻射接收機由兩級切換式低雜訊放大器、主動式巴倫和平方律功率偵測器組成。兩級 低雜訊放大器作為 SPDT 開關運作,但消除了傳統切換器所造成的高損耗的特性。由於 平方律功率偵測器需要差動輸入,因此使用主動式巴倫提供一個相位差 180 度的輸入訊 號。平方律功率偵測器採用差動結構,相較於單端結構可獲得更高的響應度。兩級低雜 訊放大器在 30.3 GHz 頻率下實現了最高 17.3 dB 的小訊號增益,並在 30 GHz 頻率下實 現了最低 4.3 dB 的雜訊指數。輻射接收機在 30 GHz 頻率下實現了最高 1.6 MV/W 的響 應度和最低 1.3 fW/√Hz 的雜訊等效功率。此外,輻射接收機可以解調輸入 30 GHz 且開 關速度高達 2 GHz 的訊號。整體輻射接收機的晶片面積為 1.24 mm2。zh_TW
dc.description.abstractSeveral microwave and millimeter-wave circuits including a watt-level Ku-band power amplifier module in Rogers4003C-FR4 based four-layer printed circuit board (PCB) process, a Ka-band low noise amplifier (LNA) in E-mode GaAs 0.15-µm PIN-HEMT monolithic process, a Ka-band low noise amplifier (LNA) in 90-nm CMOS process, a switchless radiometer receiver in 90-nm CMOS process are presented in this thesis. In Chapter 2, a Ku-band watt-level power amplifier module is designed in a Rogers4003CFR4 based four-layer printed circuit board (PCB) process. The power amplifier module achieves a maximum small-signal gain of 25 dB with a 3-dB bandwidth ranging from 14.3 to 18.7 GHz. The power amplifier module also achieves an input P1dB of 2 dBm, a peak PAE of 12.3 %, and an output saturated power of 32 dBm. Additionally, the power amplifier module using the single-bias technique is proposed to reduce the complexity in this Chapter. The power amplifier module using a single-bias technique maintains approximately the same performance compared with the power amplifier module with multiple biases. In Chapter 3, a Ka-band LNA with R-L-C feedback technique in WIN E-mode GaAs 0.15- µm PIN-HEMT process is presented. By employing cascode structure and the R-L-C feedback technique, the circuit maintains high gain and wider bandwidth while addressing stability issues. The LNA achieves a maximum small-signal gain of 22.9 dB at a frequency of 31.2 GHz, and it achieves a minimum noise figure of 2.7 dB at a frequency of 29 GHz. The LNA also achieves an input IP3 of -5 dBm, and an output IP3 of 17 dBm. The total chip size of the LNA is 1.05 mm2 . In Chapter 4, a Ka-band current-reused-transformer-based LNA with forward bodybiasing technique in TSMC GUTM 90-nm CMOS process is presented. A center-tapped transformer with a mutual coefficient of 0.3 is used to improve small-signal gain and is realized iv at the drain in the first stage and the source in the second stage. The LNA achieves a maximum small-signal gain of 12 dB at a frequency of 25.3 GHz with a 3-dB bandwidth from 22.7 to 30.7 GHz. The LNA achieves a minimum noise figure of 3.5 dB at a frequency of 25 GHz. Additionally, the forward-body biasing technique is employed to enhance the linearity of the Ka-band LNA, achieving an input IP3 of 5.1 dBm and an output IP3 of 17.3 dBm at a frequency of 30 GHz. The total chip size of the LNA is 0.49 mm2 . In Chapter 5, a switchless radiometer receiver in TSMC GUTM 90-nm CMOS process is presented. The radiometer consists of a two-stage LNA, an active balun, and a square-law power detector. The two-stage LNA, acts as a SPDT switch, but eliminates the lossy characteristics of switches. An active balun is employed due to the requirement of a differential input of the square-law power detector. The square-law power detector adopts differential structure, which can achieve higher responsivity compared to the single structure. The two-stage LNA achieves a maximum small-signal gain of 17.3 dB at a frequency of 30.3 GHz and a minimum noise figure of 4.3dB at a frequency of 30 GHz in both the signal and the reference path. The radiometer receiver achieves a maximum responsivity of 1.6 MV/W and a minimum noise equivalent power of 1.3 fW/√Hz at a frequency of 30 GHz. Additionally, the radiometer receiver can demodulate a 30 GHz input signal with a switching speed of up to 2 GHz. The total chip size of the radiometer receiver is 1.24 mm2 .en_US
DC.subject毫米波zh_TW
DC.subject功率放大器模組zh_TW
DC.subject低雜訊放大器zh_TW
DC.subject輻射接收機zh_TW
DC.subject砷化鎵zh_TW
DC.subject金屬氧化物半導體zh_TW
DC.subjectMillimeter-waveen_US
DC.subjectPower Amplifier Moduleen_US
DC.subjectLow Noise Amplifieren_US
DC.subjectRadiometer Receiveren_US
DC.subjectGallium Arsenideen_US
DC.subjectCMOSen_US
DC.title應用於 Ku 頻段瓦特級功率放大器模組暨 Ka 頻 段 CMOS 無切換器輻射接收機之研製zh_TW
dc.language.isozh-TWzh-TW
DC.titleDesign of a Watt-level Power Amplifier Module for Ku-band and a Switchless Radiometer Receiver in CMOS Process for Ka-banden_US
DC.type博碩士論文zh_TW
DC.typethesisen_US
DC.publisherNational Central Universityen_US

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