| dc.description.abstract | In the conventional E-mode p-GaN gate structure, the p-GaN gate has Schottky contact, the threshold voltage value is limited to about 1 V ~ 2 V, and the drain output current density is also low. This paper mainly studies a novel E-mode MIS p-GaN gate HEMT that adds a layer of silicon nitride as the gate insulator layer. In the novel structure, a depletion mode metal-insulator-semiconductor gate structure is formed between two p-GaN in order to increase the carrier concentration in the 2DEG channel. On both p-GaN sides are enhanced metal-insulator-p-GaN gate structures to modulate the conduction band to make it a normally-off device. After the devices are fabricated, characteristic analysis is completed by measuring the static and dynamic characteristics of the device, and the physical analysis of the novel gate structure is studied using Silvaco TCAD simulation.
In the novel E-mode gate device combining metal-insulator-semiconductor and p-GaN with different gate metal lengths, it can be observed that as the gate metal length increases, the 2DEG channel can be better controlled. Ability to increase the ID,max, reduce the RON, increase the Ion/Ioff, and increase the Gm.
Compared with the conventional E-mode MIS p-GaN gate HEMT, the novel E-mode MIS p-GaN gate HEMT improves the drain current density and Gm reach 299 % (114.6 mA/mm) and 214 % (56.4 mS/mm), and the RON is also reduced to 17.9 Ω·mm. In addition, Ion/Ioff of the device also increased from 1.0 × 104 to 6.0 × 108, indicating that the novel gate device can improve the control capability of the channel below the gate, thereby improving the conduction characteristics of the device. Measurement of device dynamic characteristics, gate delay, gate and drain delay measurements can observe the current collapse effect and RON degradation of conventional E-mode MIS p-GaN gate HEMT is more serious, and novel gate device can indeed improve the current collapse effect.
Finally, regarding the analysis of the insulator layer/semiconductor interface quality, the curve offset of capacitance-voltage hysteresis measurement and the conductance method, were used to extract the interface state density. The results show that the interface state density of the metal-insulator-semiconductor diode in SiN/AlGaN is significantly higher than that of AlGaN/GaN, indicating that the surface damage caused by etching plasma is huge. In addition, the complex novel metal-insulator-semiconductor and p-GaN gate structure still needs to be optimized for the comprehensive interface state density of SiN/AlGaN and SiN/p-GaN. | en_US |