| dc.description.abstract | This thesis presents the design and fabrication of various RF power amplifiers using different technologies, including WIN′s 0.25-μm GaN/SiC, GaAs Integrated Passive Device (IPD) technology, and tsmc′s 90-nm CMOS 1P6M process. The three designs include: 1). A continuous class-B mode power amplifier for X-band applications using GaN/SiC technology,
2). A flip-chip assembled K-band power amplifier (PA) and 3). A broadband transmitter for the FR3 band.
The first chip is a continuous class-B mode power amplifier designed for the X band,utilizing GaN/SiC technology. Its output matching network is optimized for both fundamental
and second harmonic frequencies to meet the requirements of continuous class-B mode operation. By fine-tuning the biasing, the linearity of the amplifier is improved. The design achieves a 3-dB bandwidth ranging from 9.0 to 11.0 GHz, with a small-signal gain of 16.15 dB.
Continuous wave (CW) measurements show a maximum saturated output power of 35.27 dBm, a power-added efficiency (PAE) of up to 24.12%, and an OP1dB of 21.06 dBm. The chip size measures 4.59 mm2 (2.7 mm × 1.7 mm).
The second chip is a flip-chip assembled K-band PA, developed using WIN Semiconductors’ 0.25-μm GaN/SiC technology and GaAs IPD technology. Flip-chip technology reduces the overall cost by minimizing the GaN chip size, while GaAs IPD chips,costing about one-quarter of GaN 0.25 μm chips, further contribute to cost efficiency. This
optimized transition can be applied to frequencies up to 51 GHz. The fabricated PA achieves a saturated output power of 25.16 dBm, a peak PAE of 12.49%, a gain of 11 dB, and a 3-dB
bandwidth from 24.5 to 27.8 GHz. The chip size is 3.32 mm2 (2.55 mm × 1.3 mm). This work demonstrates the feasibility of using flip-chip assembly technology for K-band PA design.
The third chip is a broadband transmitter designed for the FR3 band. It is a single-channel in-phase transmitter fabricated using tsmc′s 90-nm CMOS technology. The design incorporates a CMOS baseband inverter-type amplifier with resistive feedback, which increases the output impedance in the baseband circuit. A passive mixer is used for up-conversion, chosen for its low power consumption and high linearity. The driver amplifier employs a cascode topology to enhance conversion gain, improving output power performance. To ensure stability, resistor-capacitor (RC) feedback is applied to the driver amplifier. The proposed I-channel transmitter achieves conversion gain of 9.35 dB, with an output 1-dB compression point (OP1dB) of -1.79 dBm under a local oscillator (LO) power of 10 dBm at a center frequency of 11 GHz. The measured gain bandwidth spans from 9 to 12 GHz. The chip consumes 49.2 mW of DC power and has a total area of 0.9 mm2 (1.23 mm × 0.732 mm). | en_US |