| dc.description.abstract | This study aims to develop a machine learning system-on-a-chip (MLSoC) that integrates a Probabilistic Neural Network (PNN) with RISC-V, leveraging the advantages of hardware acceleration while maintaining the versatility of a microprocessor to achieve high performance and highly customizable machine learning applications. The system optimizes data transfer and processing workflows between software and hardware through custom instructions and interrupt handling, enhancing overall system efficiency. The study employs the MIAT system design methodology to achieve a highly modular design, improving the flexibility of the system architecture. Additionally, to address the challenges of memory and computational resource limitations in embedded systems, this study proposes a variable precision neural network development framework, allowing developers to adjust precision according to their needs.
Experimental results show that the developed MLSoC can complete the segmentation of a 64x48 image in 66 milliseconds, with each pixel processed in approximately 21 microseconds, demonstrating that the system can provide efficient computational performance while maintaining low power consumption. Furthermore, the system exhibits good flexibility and accuracy under different precision settings.
This research provides an efficient, low-power, and scalable hardware solution for machine learning. The MLSoC design has significant potential in industrial applications, especially suitable for scenarios requiring real-time image processing and object recognition. The outcomes of this research also offer a practical reference model for other researchers, facilitating the development of more efficient machine learning solutions on FPGA, thereby advancing broader application development. | en_US |