| dc.description.abstract | Silicon-germanium heterojunction bipolar transistors (SiGe HBTs) technology has emerged as a new contender for RF and microwave applications. The major advantages of SiGe HBT include its superior microwave power performance, low cost, high thermal conductivity, and compatibility for high-level integration with CMOS technology. It has recently attracted a great deal of attention as a promising solution for future wireless power amplifier (PA) applications. Furthermore, two of the most significant HBT power device specifications for highly integrated portable wireless products are the output power (Pout) and the power added efficiency (PAE). Specific characteristics of the power device, such as gain, power density, and thermal stability meet both performance and reliability requirements. However, when operating at a high power density, the ultimate limit on the performance of an HBT is affected by the electrical safe operation area (SOA) and the thermal effects. For a multifinger power device, the increase in junction temperature at any emitter finger not only dissipates the power, but also creates thermal coupling to the other fingers. If the junction temperature of a specified finger increases, it will continue to attract a greater share of the current. The temperature increases further and appears as a hot spot in this finger. In contrast, the remaining fingers draw less current and eventually cause a current collapse. As a result, thermal instability occurs.
In addition, RF, analog and digital function blocks need to be integrated with System-on-Chip (SoC) on the same wafer, the substrate coupling model has attracted a lot of attention in SoC desgin. The unwanted switching noise generated by logic circuits causes disturbance and crosstalk to highly sensitive analog components, at high frequencies, such as LNA and VCO.
Chapter 1 is the introduction to this paper. Chapter 2 presents the effect of collector layout geometry on the electrical and electro-thermal behaviors in SiGe HBT unit-cell. An equivalent circuit model is proposed to study the electrical and electro-thermal properties on different numbers of emitter fingers. The reliability testing results indicate that HBT-1 using the conventional (type I) layout reached failure mode after being stressed for 10 seconds, which was mainly attributed to the electro-thermal effect. HBT-3 (type III) using the optimized layout survived under the same reliability test for 1000 seconds. The on-wafer power characteristics were measured using ATN load-pull system under CW class-AB operation at 5.8 GHz, the HBT-3 unit-cell yielded an improvement in the power performance figure of merit (FOM) of 179% compared with that of HBT-1, which could be attributed to the fact that HBT-3 had a low collector resistance (RC), and a uniform difference in the △V in each finger, thereby preventing unwanted thermal instability caused by the electro-thermal effect.
In chapter 3, the effect of geometry on the RF power performance of SiGe HBT unit-cells is investigated using various emitter finger spacings (S). Two unit-cells, which was designed based on the optimized layout structure (type III) in chapter 2 with the same emitter area of 8 × 0.6 × 10 m2, but with various S values are thoroughly discussed. The S values for the HBT-1 and the HBT-2 unit-cell are 2 m and 5 m, respectively. The on-wafer power characteristics were measured using ATN load-pull system under CW class-AB operations at 2.4 GHz, HBT-2 unit-cell yielded significant improvements in all power performance values compared with HBT-1. An approximately 50% improvement in FOM was achieved, which can be attributed to the fact that HBT-2 has a lower thermal effect than that of HBT-1.
In chapter 4, an optimized layout of an eight unit-cells SiGe power HBT with emitter area of 8×0.6×10 m2 based on the results from chapter 3 (type III with S=5m) was designed for high power density and efficiency performance. The on-wafer power characteristics were measured using an ATN load-pull system under CW class-AB operations at 2.4 GHz. The power HBT achieved a 1-dB compression power (P-1dB) of 27.3 dBm and a saturation output power (Psat) of 30 dBm, which was equivalent to a power density of 2.6 mW/m2 for the emitter area. A high peak power added efficiency (PAEmax) of up to 75% was obtained, with a power gain of 11.4 dB at a P3-dB of 29.0 dBm. In addition, the real part of the source impedance (Rin) was measured to be as high as 28 Ω. The impedance transfer ratio, Rin/RSystem was only 0.56, which relaxes the need for a high quality passive component (inductor) for on-chip input matching. This advantage makes it easier for the HBT to be integrated with other silicon-based transceivers in an RF SoC design.
In chapter 5, a SiGe HBT unit-cell using 0.35 m BiCMOS technology for an S-Band high efficiency linear power amplifier with an open collector adaptive bias linearizer was designed and fabricated. The electrical and thermal performance of the unit-cell was investigated, and then 34 unit-cells were combined as an output stage power device. An adaptive linearizer for the output stage was constructed using an open collector HBT bias circuit, which improved the Gp, output 1-dB compressed power (OP1dB), power added efficiency (PAE), and output third-order intermodulation point (OIP3) when compared to those of traditional adaptive bias circuits.
In Chapter 6, four substrate noise isolation structures using standard 0.18 m SiGe BiCMOS technology were investigated using S-parameter measurements. The experimental and simulated results for different isolation structures, such as triple-wall p-n junction isolated walls, deep trench isolation, and double P+ guard rings structure, are presented. The proposed structure B significantly reduced substrate noise below -70 dB up to 20 GHz. The proposed structure C with an extra triple-wall junction achieved the best isolation at lower frequency range, which |S21| was less than - 71 dB from 50 MHz to 10.05 GHz, and - 56 dB from 10.05 GHz to 20.05 GHz. The structure B is good enough and recommends for general purpose RF circuit design whereas structure C can be used in highly sensitive RF circuit block below 10 GHz. | en_US |