| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 謝恂 | zh_TW |
| DC.creator | Shyun Hsieh | en_US |
| dc.date.accessioned | 2006-7-17T07:39:07Z | |
| dc.date.available | 2006-7-17T07:39:07Z | |
| dc.date.issued | 2006 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:444/thesis/view_etd.asp?URN=93521019 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 傳統在做電路模擬分析時，往往將元件參數彼此間的變動視為獨立而不相關，但是電路在晶圓廠製造過程中，電晶體彼此間的參數變動會有某種程度的關聯性；故本論文主要是建立一個：引入元件參數彼此間有空間相關性的模擬方式，來分析雙級運算放大器效能的表現，並藉由此方法來找尋類比電路在佈局時電晶體最佳的擺放位置。 | zh_TW |
| dc.description.abstract | We used to treat the parameter between devices as independent in traditional circuit simulation. However, the parameter variation in each transistor should have certain correlation during manufacturing process. This thesis presents a methodology to simulate a two-stage OP-Amplifier with spatial correlation in each transistor parameter. Based on this method, the best transistor permutation in this analog circuit is found. | en_US |
| DC.subject | 最佳佈局方式 | zh_TW |
| DC.subject | 不匹配 | zh_TW |
| DC.subject | 空間相關性 | zh_TW |
| DC.subject | parameter variation | en_US |
| DC.subject | mismatch | en_US |
| DC.subject | spatial correlation | en_US |
| DC.title | 使用空間相關性分析之雙級運算放大器佈局 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | Two-Stage OP-Amp Layout by Spatial Correlation Analysis | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |