dc.description.abstract | The thesis presents RF front-end circuits for Ka/V-band receiver, the circuits are both implemented on TSMC 0.18 μm and TSMC 0.13 μm CMOS technologies. The implemented circuits include two V-band low noise amplifiers, a V-band doubly balanced mixer, and three Ka-band doubly balanced mixers.
The LNAs include three cascade common source (CS) stages. In the two LNAs, the current density is used to decide transistor size and bias condition. The first stage of LNA is biased for the minimal noise figure (〖NF〗_min). The other stages are biased for the trade-off between the gain and NF. The grounded coplanar waveguide (GCPW) transmission line is used to shield the electrical and magnetic field from penetrating the substrate. The GCPW line has both advantages of microstrip line and coplanar wave-guide (CPW). LNA1 achieves a measured peak power gain of 12.2 dB at 54.4 GHz and only consumes a DC power of 8.8 mW. The measured NF of the LNA is 4.7 dB at 61 GHz, and 3-dB bandwidth is about 8.3 GHz. The chip size is only 0.35 mm^2. LNA2 is highly linear LNA. For the lowest 〖NF〗_min, the first stage of LNA2 is biased at current density of the lowest 〖NF〗_min. The other stages are biased at current density of the trade-off between gain and NF. The third stage CS amplifier with a third-order transconductance (g_m3) cancellation cell operates in parallel to compensate negative g_m3 value, and then it can enhance the linearity of LNA. The designed LNA achieves a measured peak power gain of 10.7 dB at 54.8 GHz. The measured NF of the LNA is 3.7 dB at 61 GHz. When g_m3 cancellation cell is biased at negative bulk-to-source voltage, the linearity of LNA would be better than 2 dBm and the power consumption is only 6.8 mW. The 3-dB bandwidth is about 9.7 GHz. The chip size is 0.35 mm^2.
The V band mixer includes an LO stacked Marchand balun, and bandwidth of the balun is larger than transformer. Since RF and LO are single in, the measurement is simpler than fully differential one. The mixer core adopted a bulk-driven topology. Since the mixer core draw very few current, the mixer has very low power consumption. The designed mixer achieves a measured conversion gain of -3 dB at 64 GHz, and it consumes 0.644 mW. The input 1-dB compression point (IP1dB) is -5 dBm, and the input third-order intercept point (IIP3) is 5 dBm at 64 GHz. The chip size is 0.55 mm^2.
The three Ka-band mixers are Gilbert cell mixer with current bleeding, bulk-driven mixer, and bulk-driven mixer. The traditional Gilbert cell mixer (Mixer A) with current bleeding technique can improve mixer noise and maintain the conversion gain. Furthermore, the inductors are added parallel between the switching stage, RF stage, and current bleeding to resonate out the total capacitance looking into the drain of RF stage to enhance conversion gain. The mixer achieves a measured conversion gain of 8.745 dB at 26 GHz, and it consumes 18.46 mW. The input 1-dB compression point is -16 dBm, and the IIP3 is -2 dBm at 26 GHz. The chip size is 0.65 mm^2. Mixer B is a bulk-driven mixer, it also includes an LO stacked Marchand balun. The peak conversion gain is 8.088 dB at RF frequency 28.7 GHz, and only needs very low power consumption of 0.3136 mW. The input 1-dB compression point is -14 dBm, and theIIP3 is -5 dBm at 28.7 GHz. The chip size is 0.828 mm^2. Final, mixer C compared to mixer A is added a common source in front of the mixer for the higher conversion gain and lower NF. It also includes an LO stacked Marchand balun. The peak conversion gain is 12.43 dB at RF frequency of 27 GHz, and only need very low power consumption of 2.505 mW. The input 1-dB compression point of -17 dBm, and the IIP3 is -8.6 dBm at 27 GHz. The chip size is 0.82 mm^2.
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