| DC 欄位 |
值 |
語言 |
| DC.contributor | 電機工程學系 | zh_TW |
| DC.creator | 林銘鴻 | zh_TW |
| DC.creator | Ming-Hong Lin | en_US |
| dc.date.accessioned | 2009-7-21T07:39:07Z | |
| dc.date.available | 2009-7-21T07:39:07Z | |
| dc.date.issued | 2009 | |
| dc.identifier.uri | http://ir.lib.ncu.edu.tw:444/thesis/view_etd.asp?URN=965201081 | |
| dc.contributor.department | 電機工程學系 | zh_TW |
| DC.description | 國立中央大學 | zh_TW |
| DC.description | National Central University | en_US |
| dc.description.abstract | 本篇論文針對穩態視覺誘發電位之腦電訊號處理設計數位訊號處理電路，實現具即時性的大腦人機介面系統。旨在改善目前相關研究必須建構於使用個人電腦搭配線上訊號處理軟體以及資料擷取卡等的高成本實現方式。本研究以FPGA為基礎的實現方式，設計相當電路實現SSVEP之硬體即時信號處理電路，用以建立低成本與方便使用的BCI系統。另外，為有效誘發SSVEP之腦電訊號，本篇論文設計LED閃爍燈電路以視覺刺激方式誘發，為辨別多組LED閃爍燈以FPGA實現單頻多相位編碼技術產生多組訊號驅動之。最後經由實驗結果證明本系統確能有效誘發出使用者之 SSVEP，達成即時SSVEP信號處理，並且能有高準確辨識率。
| zh_TW |
| dc.description.abstract | This thesis mainly at the design of an electroencephalogram (EEG) digital signal processing circuit of steady state visual evoked potential (SSVEP) to implement a real time brain computer interface (BCI) system. In order to improve the relevant BCI researches take quite a few of cost on implement through personal computer, online signal processing software and data acquisition card. The FPGA-based implementation method is proposed to establish a low cost and easy to use BCI system through design the hardware real time signal processing circuit of SSVEP. Moreover, in order that the EEG signal of SSVEP is evoked availably, design a light emitting diode (LED) flicker light circuit and the visual stimulated method is proposed in this paper. And in order to indentify lots of LED flicker light is driven through the single frequency and multi phase encoding technique from FPGA. Finally, the system is verification that the SSVEP of user can be evoked availably, real time signal processed and higher accuracy rate form the experiment result.
| en_US |
| DC.subject | 穩態視覺誘發電位 | zh_TW |
| DC.subject | 腦電訊號 | zh_TW |
| DC.subject | 大腦人機介面 | zh_TW |
| DC.subject | EEG | en_US |
| DC.subject | SSVEP | en_US |
| DC.subject | BCI | en_US |
| DC.subject | FPGA | en_US |
| DC.title | FPGA即時實現穩態視覺誘發腦電訊號處理之大腦人機介面 | zh_TW |
| dc.language.iso | zh-TW | zh-TW |
| DC.title | FPGA Based Real Time SSVEP Signal Processing for BCI System | en_US |
| DC.type | 博碩士論文 | zh_TW |
| DC.type | thesis | en_US |
| DC.publisher | National Central University | en_US |