DC 欄位 |
值 |
語言 |
DC.contributor | 電機工程學系 | zh_TW |
DC.creator | 李明師 | zh_TW |
DC.creator | Ming-Shih Lee | en_US |
dc.date.accessioned | 2011-8-12T07:39:07Z | |
dc.date.available | 2011-8-12T07:39:07Z | |
dc.date.issued | 2011 | |
dc.identifier.uri | http://ir.lib.ncu.edu.tw:444/thesis/view_etd.asp?URN=985201056 | |
dc.contributor.department | 電機工程學系 | zh_TW |
DC.description | 國立中央大學 | zh_TW |
DC.description | National Central University | en_US |
dc.description.abstract | 本論文整合一維複晶矽奈米線與PIN結構於一體,實作出奈米線穿隧式場效電晶體。期望能有效地改善金氧半場效電晶體的短通道效應、次臨限斜率與靜態漏電流。其關鍵製程簡述如下:利用側壁回蝕技術在陡直的平台側壁形成一維複晶矽奈米線,再藉由二次黃光微影製程分別對一維複晶矽奈米線進行P+ 和N+ 離子佈植形成PIN結構,進而實作出奈米線穿隧式場效電晶體。因此於變溫的電流-電壓曲線、次臨限斜率-溫度曲線以及導通電流-溫度曲線進行電性分析。
| zh_TW |
dc.description.abstract | This thesis integrated one dimension poly-Si nanowire and PIN structure into a device, which fabricated nanowire tunneling field-effect transistor (NWT-FET). We are looking forward to improving short channel effects (SCE), subthreshold slope, (S.S.) and static leakage current (IOFF) in the metal oxide semiconductor field-effect transistor (MOS-FET). The key process of NWT-FET is described as follows: By using etched back technique, we can form one dimension poly-Si nanowire on steep mesa-sidewall. Then by using two photolithography processes, we can implant P+ and N+ on one dimension poly-Si nanowire, respectively, to form the PIN structure. Via the variable temperature measurement (300 K, 250 K, 200 K and 150 K), we experimental characterized the current-voltage (I-V), subthreshold slope-temperature (S.S.-Temp.) and on current-temperature (Ion-Temp.).
| en_US |
DC.subject | 奈米線 | zh_TW |
DC.subject | PIN | zh_TW |
DC.subject | 奈米線穿隧式場效電晶體 | zh_TW |
DC.subject | 次臨限斜率 | zh_TW |
DC.subject | 靜態漏電流 | zh_TW |
DC.subject | Nanowire | en_US |
DC.subject | PIN | en_US |
DC.subject | Nanowire Tunneling Field-Effect Transistor | en_US |
DC.subject | Subthreshold Slope | en_US |
DC.subject | Static Leakage Current | en_US |
DC.title | 新穎奈米線穿隧式場效電晶體之技術開發 | zh_TW |
dc.language.iso | zh-TW | zh-TW |
DC.title | Technology Development of Novel Naonwire Tunneling Field-Effect Transistor | en_US |
DC.type | 博碩士論文 | zh_TW |
DC.type | thesis | en_US |
DC.publisher | National Central University | en_US |