雙閘極P通道無接面場效電晶體之模擬與分析

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姓名

辛信億(Hsin-Yi Hsin) 查詢紙本館藏

畢業系所

電機工程學系

論文名稱

雙閘極P通道無接面場效電晶體之模擬與分析
(Analysis and Simulation of Double-Gate P-Channel Junctionless MOSFET)

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摘要(中)

在本篇論文中，首先介紹無接面電晶體的基本操作原理與優點，我們利用二維元件模擬來模擬無接面電晶體元件內部的電位分佈，並且可由電位分佈看出空乏區從未導通到聚積的變化，我們同時利用Poisson’s equation推導出臨限電壓公式與空乏層大小，再利用空乏層大小推導出電流公式，並且將此推導結果與我們利用二維元件模擬器得到的模擬結果做比較，以及我們改變各項參數來觀察對臨限電壓與汲極電流的影響，最後我們在模擬CMOS無接面電晶體在短通道下的開關特性，並且討論無接面電晶體在次臨限區域時，其次臨限擺幅與傳統場效電晶體的比較。

摘要(英)

In the thesis, at first we introduce the basic operating principles and advantages of the junctionless transistor. We use the two-dimensional device simulation to simulate the potential distribution of the junctionless transistor and then we get the variation of depletion region from turn-off to accumulation. We try to derive the threshold voltage and depletion layer thickness equation from Poisson’s equation, and furthermore figure out the drain current equation. We compare the equations with the result obtained by 2D numerical device simulation, and we change the parameters to observe effects of threshold voltage and drain current. At last, we simulate the switching characteristics of the short channel CMOS junctionless transistor. We compare the subthreshold swing of the junctionless transistor with a normal transistor in subthreshold region.

關鍵字(中)

★ 無接面
★ 無接面場效電晶體
★ 雙閘極P通道無接面場效電晶體

關鍵字(英)

★ Junctionless
★ Junctionless MOSFET
★ Double-Gate P-Channel Junctionless MOSFET

論文目次

摘要 .....................................................I Abstract ................................................II目錄 ....................................................III
圖目錄 ...................................................IV
表目錄 ...................................................VI
第一章簡介.................................................1
第二章雙閘極P通道無接面MOSFET之基本特性介紹.....................3
2-1二維等效模擬電路 .........................................3
2-2元件結構 ................................................3
2-3操作原理 ................................................4
2-4研究動機 ................................................8
第三章雙閘極P通道無接面MOSFET公式推導與模擬....................11
3-1元件設計參考架構圖 .......................................11
3-2臨限電壓推導 ............................................11
3-3空乏層大小推導 ..........................................14
3-4模擬驗證臨限電壓 ........................................15
3-5臨限電壓之調變 ..........................................16
3-6電位分佈圖. ............................................20
3-7 I-V特性模擬 ...........................................23
3-8 I-V特性推導與驗證 ......................................26
第四章 CMOS無接面電晶體特性模擬. .............................31
4-1 CMOS無接面電晶體元件結構.................................31
4-2 基本特性模擬. ..........................................32
4-3 次臨界特性. ...........................................34
4-4 CMOS無接面電晶體輸出入轉換特性............................36
第五章結論................................................39
參考文獻...................................................41

參考文獻

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[8] Zhuojun Chen, Yongguang Xiao, Minghua Tang, Ying Xiong, Jianqiang Huang, Jiancheng Li, Xiaochen Gu, and Yichun Zhou, “Surface-Potential- Based Drain Current Model for Long-Channel Junctionless Double-Gate MOSFETs,” IEEE Transaction on Electron Devices, vol. 59, no. 12,
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[9] J.P. Duarte, Sung-Jin Choi, Dong-Il Moon, and Yang-Kyu Choi, “Simple Analytical Bulk Current Model for Long-Channel Double-Gate Junctionless Transistors,” IEEE Electron Device Letters, vol. 32, no. 6, pp.704-706, 2011.
[10] C.‐W. Lee, A. N. Nazarov, I. Ferain, N. Dehdashti Akhavan, R. Yan,P. Razavi, R.Yu, R. T. Doria, and J.‐P. Colinge, “Low subthreshold slopein junctionless Multigate transistors,” Appl. Phys. Lett., vol. 96, no. 10,p. 102 106, Feb. 2010.
[11] E.R.Hsieh and SteveS.Chung, “A New Type of Inverter with Junctionless (J-Less) Transistors,” Silicon Nanoelectronics Workshop (SNW) , pp.1-2, 2010

指導教授

蔡曜聰(Yao-Tsung Tsai)

審核日期

2013-7-2

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