三維集成電路的發展與挑戰

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姓名

李牧民(Mu-Ming Lee) 查詢紙本館藏

畢業系所

機械工程學系

論文名稱

三維集成電路的發展與挑戰
(The Development and Challenges of 3D IC)

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摘要(中)

本論文呈現的是一個針對三維集成，包含三維集成封裝、
三維集成電路，以及使用矽穿孔技術的三維集成電路之深入探
討研究報告。三維集成、封裝、三維集成電路以及矽穿孔等將
在本研究中被定義，二維集成電路到三維集成電路的演化過程
將被詳細說明，而整個三維集成電路和矽穿孔技術的架構和
製程過程也都將在此論文中詳細呈現。本論文也將針對三維集
成電路最重要核心結構的中介層做出詳細定義，也將針對中介
層的完整製程流程做說明。最後，三維集成電路之檢測機制，
應用範圍以及三維集成電路所將面臨之挑戰也被討論。

摘要(英)

This thesis presents a survey of 3D integration, including 3D IC packing, 3D IC integration and also a survey of 3D Integrated Circuits using Through Silicon Vias (TSV). 3D integration, packing, 3D IC Integrated Circuits and also TSV will be defined, the evolution of 2D IC’s to 3D IC’s and the rationale for moving to these systems will be given, and a whole overview of the construction and process of the 3D Integrated Circuit and TSV will be presented. This thesis also will give a detail caption about the interposer, which is the heart of 3D IC, and also the manufacturing process of the interposer. Lastly, the testing mechanism, application and challenges of 3D Integrated Circuits using TSVs will be discussed.

關鍵字(中)

★ 三維集成
★ 三維集成封裝
★ 三維集成電路
★ 矽穿孔
★ 中介層

關鍵字(英)

★ 3D integration
★ 3D IC packing
★ 3D IC
★ Through Silicon Via
★ TSV
★ Interposer

論文目次

摘要 iv
Abstract v
誌謝 vi
目錄 vii
圖目錄 xi
第一章：緒論 1
1-1前言 1
1-2 研究動機與目的 2
1-3 研究架構 5
第二章：資料蒐集方法 7
2-1 網路搜尋引擎 7
2-1-1 台灣碩博士論文知識加值系統(NDLTD) 7
2-1-2 Google專利搜尋引擎(Google Patent) 8
2-1-3 Google學術搜尋引擎(Google Scholar) 8
2-1-4 HyRead Journal台灣全文資料庫 9
2-1-5 Web of Science 10
2-1-6 IEEE Xplore Digital Library 10
2-1-7 Science Direct On Line (SDOL) 11
2-1-8 CNKI 中國知識網絡服務平台 12
2-2 其他參考網站 13
2-2-1 美國專利商標局 (United States Patent and Trademark Office, USPTO) 官網 13
2-2-2 工業技術研究院 (Industrial Technology Research Institute, ITRI) 14
2-2-3 EET電子工程專輯 15
2-2-4 MoneyDJ 財經知識庫 15
2-2-5 Materialsnet 材料世界網 16
2-2-6 NAiP 北美智權股份有限公司官網 17
2-2-7 新電子科技雜誌 Micro-Electronics Magazine 18
2-2-8 休斯微技術股份有限公司(SUSS MicroTec)官網 19
第三章：結果與討論 21
3-1 三維集成的起源與發展經過 21
3-1-1 三維矽集成 22
3-1-2 三維芯片集成 23
3-2 三維集成電路的建構 25
3-2-1 三維集成電路中介層的製程流程 26
3-2-1-1 導孔的形成 27
3-2-1-2 氧化/邊界/晶種層的沉積 30
3-2-1-3 導電體的填充/電鍍 32
3-2-1-4 化學機械研磨 37
3-2-1-5 前端金屬化製程 38
3-2-1-6 承載/暫時性晶圓接合 38
3-2-1-7 晶圓薄化 39
3-2-1-8 後端金屬化製程 40
3-2-1-9 凸塊製程 40
3-2-1-10 去接合 41
3-2-2晶圓/芯片接合技術 41
3-2-2-1 晶圓對位製程 43
3-2-2-2 晶圓/芯片接合製程(接合方法) 45
3-2-2-3 晶圓接合方向 48
3-2-2-4 晶圓/芯片接合型式 49
3-2-3 三維集成電路的整合與封裝 50
3-2-3-1 系統單芯片 51
3-2-3-2 系統級封裝 52
3-2-3-3 系統單芯片和系統級封裝之細部比較與分析 53
3-2-3-4 系統整合封裝 54
3-2-3-5 芯片堆疊封裝 54
3-3 2D, 2.5D與3D 集成電路的分析與比較 55
3-4 3D IC的檢測機制 60
3-4-1 晶圓檢測 60
3-4-2 芯片檢測 62
3-5 3D IC的市場應用 64
3-5-1 3D IC記憶體應用 64
3-5-2 3D IC影像感測器應用 65
3-6 3D IC與垂直整合的優勢 66
3-7 3D IC將面臨之未來挑戰 69
第四章：結論與未來展望 73
4-1 結論 73
4-2 未來展望 76
參考文獻 78

參考文獻

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指導教授

李雄(Shyong Lee)

審核日期

2016-7-1

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