微型化垂直發光電晶體之面板研究

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姓名

吳宇霈(Yu-Pei Wu) 查詢紙本館藏

畢業系所

光電科學與工程學系

論文名稱

微型化垂直發光電晶體之面板研究
(Research of Miniaturized Vertical Light-Emitting Transistor Panel)

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至系統瀏覽論文 (2026-3-30以後開放)

摘要(中)

本論文主要研究微型化無機/有機複合式垂直發光電晶體以及在矩陣式顯示面板之應用。無機/有機複合式垂直發光電晶體的基本架構為由下至上堆疊氧化鋅電晶體以及有機發光二極體。其中氧化鋅電晶體為下閘極/上接觸結構，以透明導電膜ITO為閘極，並以原子層沉積(atomic layer deposition, ALD)製作三氧化二鋁和氧化鉿雙層介電層以及N型氧化鋅作為半導體層，再透過光學微影技術製作包覆氧化矽絕緣層之銀源極作為垂直發光電晶體之電子注入端。有機發光二極體則以高分子發光材料Super Yellow旋轉塗佈於氧化鋅電晶體之上，再蒸鍍上汲極作為電洞注入端。
整體而言，氧化鋅電晶體具備低驅動電壓、低接觸電阻、和高電子遷移率(11-12 cm2/Vs)，並可利用光學微影製程縮小ZnO面積至微米尺寸，可注入高密度和長距離橫向擴散之電子流再向上驅動有機發光二極體，實現高量子效率、均勻面出光、和高開口率之微型發光電晶體，而透過包覆源極之絕緣層可有效抑制關電流密度以提高電流與亮度之開/關比約達104。本論文將利用微型發光電晶體製作一4x4矩陣式顯示面板，在優化製程條件下，成功以Ardiuno IDE程式控制顯示面板之影像，未來可望進一步應用於高解析度之面板開發。

摘要(英)

This thesis mainly conducts research on the miniaturized inorganic/organic vertical light-emitting transistor (VLET) and its application of matrix display panel. The inorganic/organic VLET is a bottom-up integration of a ZnO transistor and an OLED. The ZnO transistor is based on a bottom-gate/top-contact configuration, consisting of transparent conductor ITO as the bottom gate, Al2O3/HfO2 bilayer-dielectric and N-type ZnO semiconductor fabricated using atomic layer deposition (ALD), and photolithographically patterned SiOx-encapsulated Ag as the source for electron injection in the VLET. The OLED was then spin-coated on the ZnO transistor with a light-emitting polymer, Super yellow, followed by deposition of top drain for hole injection.
Overall, the bottom ZnO transistor has a low-drive voltage, low contact resistance and high electron mobility (11-12 cm2/Vs), and the ZnO area can be miniaturized to micron scale with photolithography. It can inject high density and long-range lateral distribution of electron current flow to drive the top OLED, achieving a miniaturized VLET with a high quantum efficiency, uniform areal emission, and a large aperture ratio. The source encapsulated with SiOx insulator can efficiently suppress the off-current density and enhance the on-off ratios of current and luminance to 104. The miniaturized VLET is applied to develop a 4x4 matrix display panel. By optimizing the process condition and using Ardiuno IDE code, the display image is successfully controlled. This VLET is expected to be further applied to develop high-resolution panels in the future.

關鍵字(中)

★ 垂直發光電晶體
★ 微型化面板
★ 有機發光二極體

關鍵字(英)

論文目次

摘要 vii
Abstract viii
致謝 viii
目錄 x
圖目錄 xiii
第一章緒論 1
1-1 前言 1
1-2 傳統有機薄膜電晶體 3
1-3 蕭特基基底垂直式電晶體 5
1-4 有機發光二極體和顯示器 10
1-5 研究目的與動機 13
第二章基礎原理 14
2-1垂直式有機電晶體工作原理簡介 14
2-1-1轉移特性曲線與開/關電流比 18
2-2有機發光二極體之簡介 19
2-2-1有機發光二極體之工作原理 19
2-2-2有機發光二極體能量轉移機制 21
第三章實驗方法與架構 24
3-1 實驗架構及材料介紹 24
3-1-1 介電層材料介紹 24
3-1-2 半導體層材料介紹 25
3-1-3絕緣層和光阻堤防層(bank layer)材料介紹 26
3-1-4 發光層材料介紹 27
3-1-5 金屬電極材料介紹 27
3-2 實驗儀器 28
3-2-1 手套箱(Glove Box) 28
3-2-2 熱蒸鍍機(Thermal Evaporation Coater) 29
3-2-3 原子層沉積(Atomic Layer Deposition, ALD) 30
3-2-4 手動光罩接合對準器(Mask and Bond Aligner, MA6) 31
3-2-5 紫外光臭氧清洗機(UV-Ozone) 32
3-2-6 半導體參數分析儀(Semiconductor Parameter Analyzer, SPA) 33
3-2-7 旋轉塗佈機(Spin Coater) 34
3-2-8 表面輪廓儀 (Alpha-step profile meter) 34
3-2-9 Arduino 35
3-3 實驗方法與製備 37
3-3-1 氧化銦錫(ITO)導電玻璃膜製程 37
3-3-2 定義對準鑰匙(Alignment key) 39
3-3-2 垂直發光電晶體元件製程 41
第四章結果與討論 48
4-1 面板設計與製作 48
4-1-1氧化銦錫(ITO)圖案之光罩設計 48
4-1-2金屬膜對準鑰匙(Alignment key)圖案之光罩設計 49
4-1-3半導體圖案之光罩設計 50
4-1-4金屬源極圖案之光罩設計 51
4-1-4光阻堤防層(Bank layer)圖案之光罩設計 52
4-2微米尺寸單一元件量測結果 55
4-3程式碼編寫與測試 61
4-4主動式矩陣面板之圖像顯示 67
第五章結論與未來展望 69
參考資料 70

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指導教授

張瑞芬(Jui-Fen Chang)

審核日期

2021-3-30

推文