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姓名 劉冠廷(Kuan-Ting Liu) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 蝕刻深度對平台式雙累增層砷化銦鎵/砷化銦鋁單光子崩潰二極體之影響
(Effect of Etching Depth on Mesa-type InGaAs/InAlAs Single-Photon Avalanche Diodes with Dual Multiplication Layers)相關論文 檔案 [Endnote RIS 格式]
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摘要(中) 單光子崩潰二極體 (Single-photon Avalanche Diode, SPAD) 可應用於自駕車、醫療電子、光纖通訊等等。以往利用矽作為主要材料的單光子崩潰二極體，雖然其材料的缺陷較少，但材料能隙限制使得無法偵測超過 1100nm以上的光波。以砷化銦鎵為基礎的 III-V SPAD 可用來偵測短波長紅外光(short-wave infrared, SWIR)，III-V SPAD 在磊晶方面有較多的缺陷，進而造成較嚴重的暗計數與後脈衝，但其偵測波段在 SWIR 的範圍，因此亦被廣泛研究；近年文獻顯示，以砷化鋁銦 (InAlAs)作為放大層有較高的崩潰機率，可預期能有較高的單光子偵測效率 (single photon detection efficiency, SPDE)，本論文遂針對砷化銦鎵/砷化銦鋁單光子崩潰二極體進行元件製作與特性探討。
本論文以砷化銦鎵與砷化鋁銦分別作為結構中吸收層與累增層，主要目
的為偵測 SWIR 光波，元件結構包含吸收層、漸變層、電荷層、累增層，通常在結構設計上為了降低穿隧電流以降低暗計數率，會提高累增層厚度，但厚度提高同時會使後脈衝效應 (afterpulsing effect)與時基誤差 (timing jitter)變嚴重，為克服設計上的兩難，論文中於累增層中間加入額外一層電荷層以讓累增層分為高電場與次高電場區，使得實際有效發生崩潰的厚度變薄，進而改善 afterpulsing effect 與 timing jitter，同時抑制穿隧電流產生。
元件製程採用平台式結構 (mesa type) 以定義元件有效偵測尺寸，我們採用兩種在文獻中可有效降低漏電流的benzocyclobutene (BCB) 與Polyimide (PI) 做為側壁包覆層，不同保護層之元件在室溫下的崩潰電壓皆為 49 伏特，擊穿電壓為 23 伏特，溫度係數為 49 mV/K，最終選擇以 PI 保護之元件進行後續單光子特性量測；此外，我們亦經由 Silvaco TCAD 軟體以二維結構模擬不同蝕刻深度對中心電場的侷限以及對邊緣電場的抑制效果，不同蝕刻深度的元件崩潰電壓皆為 49 V、擊穿電壓皆為 23 V，將第一道平台蝕刻至第一層累增層侷限中心電場以及抑制邊緣電場的效果會比蝕刻至吸收層來得好。
SPAD 元件以被動閘控電路操作，並改變環境溫度進行量測，為降低
afterpulsing effect 以及暗計數率，我們將脈衝寬度設定為 1.5 ns 進行量測，從量測結果我們發現電場分佈對元件單光子感測特性有相當大的影響，蝕刻至累增層之元件在暗計數、單光子偵測效率上有較佳的表現，於時基誤差與後脈衝效應在不同溫度下會有不同的影響。摘要(英) Single-photon avalanche diode (SPAD) can be used in self-driving cars, medical electronics, optical fiber communications, and etc. In the past, singlephoton avalanche diodes using silicon as the material have fewer defects, but the material bandgap limit makes it impossible to detect the light wavelength above 1100 nm. III-V SPAD based on InGaAs can be used to detect short-wave infrared (SWIR) light. However, III-V SPAD suffers from high defect density during epitaxy, which will cause more serious dark count and afterpulsing. In recent years, the literature shows that the use of indium aluminum arsenide (InAlAs) as the multiplication layer has a higher probability of breakdown and can be expected to have a higher single photon detection efficiency (SPDE), therefore, this thesis focuses on the fabrication and characteristics of the InGaAs/InAlAs SPAD.
In this thesis, InGaAs and InAlAs are respectively used as the absorption layer and the multiplication layer in the SPAD structure. The choose of material and the structure design aim to detect SWIR light. The device structure includes the absorption layer, the grading layer, the charge layer, and the multiplication
layer. In order to reduce the tunneling-induced dark carriers, the multiplication layer thickness should be increased, but accompanying with the increase of the
thickness is the deteriorated afterpulsing effect and timing jitter. Therefore, in order to overcome the dilemma of dark count rate, afterpulsing, and timing jitter, we propose a novel design in the multiplication layer. That is, an additional charge layer is added to divide the multiplication layer into high electric field and subhigh electric field region, so that the thickness of the actual effective breakdown is restricted to the high electric field region, which improves the afterpulsing effect and timing jitter, and meanwhile suppresses the tunneling current.
The SPAD is fabricated into a mesa structure to define the active detection window. We use two kinds of sidewall passivation which are benzocyclobutene (BCB) and polyimide (PI) that have been demonstrated to effectively reduce leakage current by the literature. For both devices fabricated with different passivation, the breakdown and punch-through voltage at room temperature are both 49 volts and 23 volts, respectively. The temperature coefficient is 49 mV/K. PI-passivation devices are thoroughly studied with the subsequent single-photon characteristic measurements. In addition, we also calculate the two-dimensional electric filed distribution of mesa structures with etching depths by the use of TCAD Silvaco tools. The mesa structures with different etching depths have notable effect on the confinement of central electric field and the suppression of peripheral electric field. The breakdown and punch-through voltage of both devices with different etching depths are 49 V and 23 V, respectively. The central
electric field can be better confined and the peripheral electric field can be better suppressed for the mesa structure with the first mesa etched to the first
multiplication layer than for that etched to the absorption layer.
The SPAD device is operated by a passively gated mode circuit and the ambient temperature is adjusted for temperature-dependent measurements. In order to reduce the afterpulsing effect and the dark count rate, we set the pulse width to 1.5 ns for measurement. From the measurement results, we find that the electric field distribution has a remarkable effect on the single photon
characteristics of SPADs. The devices etched to the multiplication layer have better performance in dark count rate and single-photon detection efficiency. The
effect of etching profile on the timing jitter and afterpulsing effect is non-monotonic under different temperatures.關鍵字(中) ★ 單光子崩潰二極體
★ 崩潰二極體
★ 時基誤差
★ 暗計數
★ 偵測效率
★ 後脈衝關鍵字(英) 論文目次 中文摘要 ............................................................................................................ i
英文摘要 Abstract ........................................................................................... iii
致謝...................................................................................................................vi
目錄..................................................................................................................vii
圖目錄 ...............................................................................................................xi
表目錄 ............................................................................................................xvii
一、前言 ........................................................................................................... 1
1.1 研究背景............................................................................................. 1
1.2 論文架構............................................................................................. 4
二、單光子崩潰二極體.................................................................................... 6
2.1 APD 基本元件物裡............................................................................. 6
2.1.1 I-V 特性 ................................................................................... 6
2.1.2 崩潰機制.................................................................................. 8
2.1.3 元件結構設計......................................................................... 9
2.2 元件參數介紹 ................................................................................... 10
2.2.1 暗計數 (dark count rate)....................................................... 10
viii
2.2.2 單光子偵測效率 (single photon detection efficiency, SPDE)
........................................................................................................ 14
2.3 元件操作截止電路............................................................................ 16
2.3.1 自由運作電路 (free running mode circuit)............................ 16
2.3.2 閘控模式 (gated mode) ......................................................... 17
2.3.3 自我截止電路 (self-quenching)............................................ 19
三、元件結構設計與製程.............................................................................. 22
3.1 元件結構設計 ................................................................................... 22
3.1.1 模擬結果與結構設計 ........................................................... 22
3.2 光罩圖案設計 ................................................................................... 36
3.2 光罩圖案設計.......................................................................... 36
3.3 元件製程........................................................................................... 38
3.3.1 晶圓切割與清洗 ................................................................... 38
3.3.2 平台蝕刻................................................................................ 39
3.3.3 蝕刻方式選擇....................................................................... 40
3.3.4 硫化處理............................................................................... 41
3.3.5 p 與 n 金屬電極沉積 ............................................................. 41
3.3.6 側壁保護............................................................................... 42
3.3.7 開洞....................................................................................... 43
3.3.8 打線墊金屬沉積 ................................................................... 44
3.3.9 元件成品圖........................................................................... 44
四、量測架構.................................................................................................. 46
4.1 電壓與電流量測方式....................................................................... 47
4.2 暗計數量測方式 ............................................................................... 48
4.3 光計數量測方式 ............................................................................... 49
4.4 後脈衝量測方式............................................................................... 50
4.5 時基誤差量測方式........................................................................... 52
五、 量測結果................................................................................................ 54
5.1 室溫下的電壓與電流量測結果與製程良率..................................... 54
5.2 變溫下的量測結果............................................................................ 63
5.2.1 變溫下的電壓與電流量測結果............................................. 63
5.2.2 變溫下暗計數量測 ................................................................ 67
5.2.3 變溫下光計數量測 ............................................................... 74
5.2.4 後脈衝機率量測 ................................................................... 79
5.2.5 時基誤差量測....................................................................... 82
5.3 結果比較與討論............................................................................... 85
六、結論與未來展望...................................................................................... 91
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