用於 50 Gbit/sec 被動式光纖網路的超高速 累增崩潰光電二極體之開發

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吳燁昆(Yen-Kun Wu) 查詢紙本館藏

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論文名稱

用於 50 Gbit/sec 被動式光纖網路的超高速累增崩潰光電二極體之開發
(The Development of Ultrafast Avalanche Photodiode for 50G PON)

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摘要(中)

在過去的 20 年裡，高速雪崩光電二極體（APDs）在以太網被動
式光纖網絡（EPON）和 10 G-EPON 的發展中扮演了至關重要的角色。
商業化的基於 In0.52Al0.48As 的 10 G APDs 通常能夠提供比其 p-i-n
光電二極體（PDs）對應產品高出 8 dB 的靈敏度。然而，在下一代 50
G-PON 中，APDs 在中等增益操作（約 10）下所展示的 3-dB 帶寬不
足以滿足 50 G 操作的頻寬要求（>30 GHz），這使得 50 G APD 接收
器的靈敏度提升並不明顯。已有研究表明，可以通過使用複雜的均衡
器積體電路（ICs）和高功率 PD 與半導體光放大器（SOA）進行混合
或單晶積體化整合來改善接收端的靈敏度。然而，這些額外的 ICs 和
預放大的SOAs需要大電流偏壓，導致接收端的總功率消耗顯著增加。
此外，SOAs 中的額外放大自發輻射（ASE）雜訊可能導致接收端靈
敏度的改善非常有限。
在高速雪崩光電二極體（APD）中，減薄倍增（M）層是提高其增
益帶寬積（GBP）和降低過量雜訊的有效方法。然而，這種縮減通常
伴隨著一些問題，例如由於非常薄的累增層（<100 nm）導致的直接
v
隧道效應引起的巨大漏電流（>1 μA），以及由於空乏層厚度減少而導
致的 RC 限制頻寬下降。
在本篇論文中，我們展示了一種p極面朝上蝕刻平台結構的APD，
其中在薄(<50nm)且疊接式的 In0.52Al0.48As 累增層下方埋有厚的
InP 集極層，可以從根本上降低暗電流、RC 限制頻寬、累增增益和雪
崩延遲時間之間的權衡。應用這種先進的元件結構，我們探討了具有
不同累增層厚度（<50 nm）的 APD 性能。而此元件的主動窗口(平台)
其直徑為 10（20）μm，其優化後的累增層元件在 1.55 μm 波長的激
發下，於偏壓為 0.9Vb 時有著低暗電流(~0.4 μA)和高響應度（2.8 A/W；
增益=9.3）的表現。
此外，該元件表現出優異的動態性能，包括在 0.84 A/W 時的寬光
電頻寬（44 GHz）、極大的 GBP（1.03 THz）和高飽和電流（12 mA），
這對應於在 45 GHz 時較大的毫米波（MMW）輸出功率（~0 dBm）。
我們的增益頻寬積表現甚至超越最近所發表的 Si-Ge APD。
優異的速度性能結合寬動態範圍和簡單的頂部收光結構，為進一
步提高 50 G 的被動式光纖網絡（PON）的靈敏度開闢了新可能。

摘要(英)

Over the last 20 years, high-speed avalanche photodiodes (APDs) have
played a vital role in the development of the Ethernet Passive Optical
Network (EPON) and 10 G-EPON. The commercially available
In0.52Al0.48As based 10 G APDs can usually provide an 8 dB higher
sensitivity than that of their p-i-n photodiode (PDs) counterparts. However,
in the next generation of 50 G-PON, the 3-dB bandwidth demonstrated by
APDs under moderate gain operation (~10) is insufficient to meet the
bandwidth requirements for 50 G operation (> 30 GHz), with less
pronounced benefits for the sensitivity of 50 G APD based receivers .
It has been demonstrated that the sensitivity at the receiver-end can be
improved by the incorporation of complex equalizer integrated circuits
(ICs) and high-power PDs, which are hybrid or monolithic integrated with
the semiconductor optical amplifier (SOA).
However, both the additional ICs and pre-amplified SOAs need large
extra bias currents which leads to a significant increase of overall power
consumption in the receiver-end. Moreover, the additional amplified
spontaneous emission (ASE) noise in the SOAs may result in marginal
improvement in sensitivity in the receiver-end.

ii
The thinning of the multiplication (M) layers in high-speed avalanche
photodiodes (APDs) is an effective way to boost up its gain-bandwidth
product (GBP) and reduce excess noise. However, such downscaling
usually comes with a price, a huge leakage current (> 1 μA) induced by
direct tunneling through the ultimate thin M-layer (< 100 nm) and
degradation of the RC-limited bandwidth due to the decrease in depletion
layer thickness.
In this work, we demonstrate how a p-side up top-illuminated APD
structure with a thick InP collector layer buried below the thin and cascaded
In0.52Al0.48As based multiplication layer can fundamentally relax the tradeoffs among the dark current, RC-limited bandwidth, multiplication gain,
and avalanche delay time. Applying this advanced device structure, we
then explore the performance of APDs with different thin M-layer
thicknesses (< 50 nm). Under1.55 μm wavelength excitation, a device
fabricated with a large active window (mesa) diameter of 10 (20) μm and
an optimized M-layer thickness exhibits a dark current as low as ~0.4 μA
and a high responsivity (2.8 A/W; gain=9.3) at 0.9 Vbr.
Moreover, this device exhibits excellent dynamic performance,
including a wide optical-to-electrical bandwidth (44 GHz at 0.84 A/W), an
extremely large GBP of 1.03 THz, and a high saturation current (12 mA),
which corresponds to a large millimeter-wave (MMW) output power (~0
dBm) at 45 GHz.
iii
The excellent speed performance coupled with the wide dynamic
range and simple top-illuminated structure opens up new possibilities to
further enhance the sensitivity of 50 G passive optical networks (PONs).

關鍵字(中)

★ 被動式光纖網路
★ 累增崩潰光電二極體

關鍵字(英)

論文目次

Abstract i
摘要 iv
目錄 vii
圖目錄 ix
表目錄 xiv
第一章序論 1
§1-1光纖網路 1
I. 主動乙太網路(Active Ethernet, AE) 2
II. 被動式光纖網路(Passive Optical Network, PON) 3
III. 50G PON 發射和接收器發展近況 6
§1-2 累增崩潰光二極體(APD)之工作原理 15
I. Si-Ge 累增崩潰光二極體(APD) 18
II. InP based累增崩潰光二極體(APD) 23
III. InAlAs based 累增崩潰光二極體(APD) 25
§1-3 論文研究動機及架構 27
第二章累增崩潰光二極體之設計與製作 28
§2-1 APD中的電場限制 28
§2-2累增崩潰光二極體之設計與模擬 31
§2-3累增崩潰光二極體之製作 42
§2-4疊接式累增層設計結論 62
第三章累增崩潰光偵測器之直流與頻寬量測及結果討論 64
§3-1 DC 量測系統之架設 64
§3-2光電流量測結果 66
§3-3頻率響應量測系統之架設 69
§3-4頻率響應量測結果 70
§3-5 元件模擬S11反射係數測量結果 73
§3-6 載子傳輸時間與RC限制頻寬量測結果 76
§3-7 Heterodyne-Beating 量測系統之架設 81
§3-8 光飽和電流量測結果 84
第四章結論與未來研究方向 86
§4-1 結論 86
§4-2 未來研究方向 87
參考文獻 94

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指導教授

許晉瑋

審核日期

2024-7-25

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