以作者查詢圖書館館藏 、以作者查詢臺灣博碩士 、以作者查詢全國書目 、勘誤回報 、線上人數:23 、訪客IP:18.189.182.160
姓名 林昶甫(Chang-Fu Lin) 查詢紙本館藏 畢業系所 電機工程學系 論文名稱 考慮障礙物閃避及電荷分享之鑽孔數量最小化跳線插入演算法
(Via-Minimization Jumper Insertion Algorithm Considering Obstacle Avoidance and Charge Sharing)相關論文 檔案 [Endnote RIS 格式] [Bibtex 格式] [相關文章] [文章引用] [完整記錄] [館藏目錄] [檢視] [下載]
- 本電子論文使用權限為同意立即開放。
- 已達開放權限電子全文僅授權使用者為學術研究之目的,進行個人非營利性質之檢索、閱讀、列印。
- 請遵守中華民國著作權法之相關規定,切勿任意重製、散佈、改作、轉貼、播送,以免觸法。
摘要(中) 隨著超大型積體電路(VLSI)製程的演進,天線效應(antenna effect)降低製造良率(manufacturing yield)的現象越來越明顯。在實體設計(physical design)階段,如何避免天線效應的影響,已經成為十分重要的課題。
由於修改部分電路布局(layout)的動作較為容易且有效率,因此使用跳線插入(jumper insertion)作為避免天線效應的方法較常被選擇使用。現今使用跳線插入必須考慮到金屬層數(metal layer)、電荷分享(charge sharing)、製造時符合天線規則(antenna rule)與跳線終止層數(jumper end layer),但是目前尚未有一套完整的方法可同時處理以上四點議題。
本論文提出,首先利用金屬移除(metal removing)的方式,將繞線樹(routing tree)拆解成數個子繞線樹,並找尋需要插入跳線的子繞線樹及其跳線終止層數。再使用網路流(network flow)的概念對閘極氧化層分組,並利用整數線性規劃(integer linear programming)模型找尋最少鑽孔(via)數量的跳線插入以完成分組的動作,即拆解成更小的子繞線樹。遞迴執行上述兩個方法,直至所有子繞線樹均被完全拆解為止。實驗結果顯示,我們提出的方法可使用最少數量的鑽孔,避免繞線樹的天線效應,且保證繞線樹不會在製造階段有違反天線效應的情況。
摘要(英) With the evolution of VLSI process, the manufacturing yield loss caused by the antenna effect is more and more obvious. As a result, avoiding the antenna effect is an important issue in physical design.
Since modifying some parts of a circuit layout is simpler and more effective, jumper insertion is a general approach to avoid antenna effect. Using jumper insertion should consider metal layer, charge sharing, jumper end layers, and maintaining antenna rule during manufacturing in modern designs. However, there is no jumper insertion algorithm completely consider the four issues.
This study first proposes a metal removing method to separate a routing tree into sub-trees, to find sub-trees violating antenna rule, and to decide the jumper end layer for these sub-trees. Then, the network flow method is considered for vertex grouping to solve antenna problems. Moreover, using integer linear programming to separate an antenna violating sub-tree into antenna free sub-trees with minimal via usage for jumper insertion. Above two methods are used recursively until all sub-trees do not exist. Experimental results show that the proposed jumper insertion algorithm can use minimal number of vias to avoid antenna effect on routing trees with guaranteeing that the antenna rule is obeyed on the routing tree during manufacturing.
關鍵字(中) ★ 鑽孔數量最小化
★ 障礙物閃避
★ 跳線插入
★ 天線效應
★ 電荷分享關鍵字(英) ★ via-minimization
★ obstacle avoidance
★ charge sharing
★ antenna effect
★ jumper insertion論文目次 摘要............................................................................................................................. i
Abstract....................................................................................................................... ii
致謝............................................................................................................................. iii
目錄............................................................................................................................. iv
圖目錄......................................................................................................................... vi
表目錄......................................................................................................................... viii
第一章、緒論.............................................................................................................. 1
1.1 造成天線效應的原因..................................................................................... 1
1.2 天線效應的影響............................................................................................ 2
1.3 天線效應規則(Antenna Rule)................................................................... 3
1.4 天線效應避免(Antenna Avoidance)的方法............................................... 4
1.4.1 金屬層分配(Layer Assignment﹞....................................................... 4
1.4.2 二極體插入(Diode Insertion)........................................................... 5
1.4.3 跳線插入(Jumper Insertion)............................................................ 6
1.5 跳線插入的考量............................................................................................ 7
1.5.1 考量金屬層數(Metal Layer)............................................................ 7
1.5.2 考量電荷分享(Charge Sharing)....................................................... 8
1.5.3 考量製造時符合天線規則.................................................................... 10
1.5.4 考量跳線終止層數............................................................................... 12
1.6 問題描述....................................................................................................... 14
第二章、相關研究....................................................................................................... 15
2.1 繞線層分配相關研究..................................................................................... 15
2.2 二極體插入相關研究..................................................................................... 18
2.3 跳線插入相關研究......................................................................................... 22
第三章、跳線插入演算法............................................................................................ 28
3.1 跳線插入演算法流程..................................................................................... 28
3.2 金屬移除(Metal Removing)...................................................................... 29
3.2.1 金屬移除問題描述............................................................................... 29
3.2.2 金屬移除概念....................................................................................... 31
3.2.3 金屬移除運作方式............................................................................... 33
3.3 跳線預測(Jumper Prediction)................................................................... 33
3.3.1 考量障礙物之跳線預測(Jumper Prediction with Obstacles)........... 34
3.3.2 障礙線段(Obstacle Edge)................................................................ 36
3.3.3 處理無法插入跳線線段(Edge without Space for Jumper)............... 37
3.4 跳線決定(Jumper Determination)............................................................ 39
3.4.1 跳線決定問題描述............................................................................... 39
3.4.2 使用網路流概念(Network Flow Consideration)............................... 39
3.4.3 建立整數線性規劃模型(Integer Linear Programming Model)......... 41
3.4.4 流量限制.............................................................................................. 43
3.4.5 目標方程式(Objective Function)..................................................... 46
第四章、實驗結果與分析............................................................................................ 51
4.1 實驗環境及實驗電路..................................................................................... 51
4.2 實驗結果....................................................................................................... 51
第五章、結論.............................................................................................................. 60
參考文獻...................................................................................................................... 61
參考文獻 [1] http://www-01.ibm.com/software/integration/optimization/cplex-optimizer/.
[2] http://www.cadence.com/products/di/soc encounter/.
[3] Peter H. Chen, Sunil Malkani, Chun-Mou Peng, and James Lin, “Fixing antenna problem by dynamic diode dropping and jumper insertion,” in Proceedings of IEEE International Symposium on Quality Electronic Design (ISQED), March 2000, pp. 275 –282.
[4] Jason Cong, Jie Fang, Min Xie, and Yan Zhang, “Mars - a multilevel full-chip gridless routing system,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 24, no. 3, pp. 382–394, March 2005.
[5] Xin Gao and Luca Macchiarulo, “A jumper insertion algorithm under antenna ratio and timing constraints,” in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2011, pp. 290 –297.
[6] Tsung-Yi Ho, Yao-Wen Chang, and Sao-Jie Chen, “Multilevel routing with antenna avoidance,” in Proceedings of ACM International Symposium on Physical Design (ISPD), April 2004, pp. 34–40.
[7] Li-Da Huang, Xiaoping Tang, Hua Xiang, D.F. Wong, and I-Min Liu, “A polynomial time optimal diode insertion/routing algorithm for fixing antenna problem,” in Proceedings of ACM/IEEE Design, Automation and Test in Europe (DATE), March 2002, pp. 470 –475.
[8] Li-Da Huang, Xiaoping Tang, Hua Xiang, D.F. Wong, and I-Min Liu, “A polynomial time-optimal diode insertion/routing algorithm for fixing antenna problem,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 1, pp. 141 – 147, January 2004.
[9] Zhe-Wei Jiang and Yao-Wen Chang, “An optimal network-flow-based simultaneous diode and jumper insertion algorithm for antenna fixing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 6, pp. 1055 –1065, June 2008.
[10] Sukhamay Kundu and Jayadev Misra, “A linear tree partitioning algorithm,” SIAM Journal on Computing, vol. 6, no. 1, pp. 151–154, March 1977.
[11] Chia-Yi Lee and Tai-Chen Chen, “Detailed routing for FIB probing,” Master’s thesis, National Central University, July 2012.
[12] Tsung-Hsien Lee and Ting-Chi Wang, “Congestion-constrained layer assignment for via minimization in global routing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 9, pp. 1643 –1656, September 2008.
[13] Tsung-Hsien Lee and Ting-Chi Wang, “Simultaneous antenna avoidance and via optimization in layer assignment of multi-layer global routing,” in Proceedings of IEEE/ACM International Conference on Computer-Aided Design (ICCAD), November 2010, pp. 312 –318.
[14] Jarrod A. Roy, Saurabh N. Adya, David A. Papa, and Igor L. Markov, “Min-cut floorplacement,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), vol. 25, no. 7, pp. 1313–1326, July 2006.
[15] Hyungcheol Shin and Chenming Hu, “Thin gate oxide damage due to plasma processing,” Semiconductor Science and Technology, vol. 11, no. 4, pp. 463 –473, November 1996.
[16] Hiroshi Shirota, Toshiyuki Sadakane, Masayuki Terai, and Kaoru Okazaki, “A new router for reducing ”antenna effect” in ASIC design,” in Proceedings of IEEE Custom Integrated Circuits Conference (CICC), May 1998, pp. 601 –604.
[17] Hiroshi Shirota, Satoshi Shibatani, and Masayuki Terai, “A new rip-up and reroute algorithm for very large scale gate arrays,” in Proceedings of IEEE Custom Integrated Circuits Conference (CICC), May 1996, pp. 171 –174.
[18] Bor-Yiing Su and Yao-Wen Chang, “An exact jumper insertion algorithm for antenna effect avoidance/fixing,” in Proceedings of ACM/IEEE Design Automation Conference (DAC), June 2005, pp. 325–328.
[19] Bor-Yiing Su and Yao-Wen Chang, “An optimal jumper-insertion algorithm for antenna avoidance/fixing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 10, pp. 1818 –1829, October 2007.
[20] Bor-Yiing Su, Yao-Wen Chang, and Jiang Hu, “An optimal jumper insertion algorithm for antenna avoidance/fixing on general routing trees with obstacles,” in Proceedings of ACM International Symposium on Physical Design (ISPD), April 2006, pp. 56–63.
[21] Bor-Yiing Su, Yao-Wen Chang, and Jiang Hu, “An exact jumper-insertion algorithm for antenna violation avoidance/fixing considering routing obstacles,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 4, pp. 719 –733, April 2007.
[22] Jia Wang and Hai Zhou, “Optimal jumper insertion for antenna avoidance considering antenna charge sharing,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 8, pp. 1445 –1453, August 2007.
[23] Di Wu, Jiang Hu, and Rabi N. Mahapatra, “Antenna avoidance in layer assignment,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 4, pp. 734 – 738, April 2006.
指導教授 陳泰蓁(Tai-Chen Chen) 審核日期 2012-8-15 推文 facebook plurk twitter funp google live udn HD myshare reddit netvibes friend youpush delicious baidu 網路書籤 Google bookmarks del.icio.us hemidemi myshare