24 GHz汽車防撞雷達收發積體電路之研製 ;Design of 24 GHz Radar Integrated Circuits for Automotive Applications

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/10461

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/10461

Title:	24 GHz汽車防撞雷達收發積體電路之研製;Design of 24 GHz Radar Integrated Circuits for Automotive Applications
Authors:	吳翊碩;Yi-shuo Wu
Contributors:	電機工程研究所
Keywords:	頻率合成器;壓控振盪器;收發機;PLL;Transceiver;VCO
Date:	2009-07-08
Issue Date:	2009-09-22 12:18:02 (UTC+8)
Publisher:	國立中央大學圖書館
Abstract:	本論文主要是設計並實現一24 GHz 汽車防撞雷達收發積體電路，此收發積體電路中各個子電路的設計與製作皆是採用穩懋半導體所提供的0.5 ?m E/D-PHEMT製程。首先本論文的第一章緒論中會介紹汽車雷達測距與測速的原理，第二章則是壓控振盪器的設計原理，第三章為應用於K頻段的差動壓控振盪器，輸出頻率變化可從18.8到27.5 GHz，擁有可調頻率的百分比為38%，輸出功率皆大於4 dBm以上，其性能指標(FOMP)可達-177 dBc/Hz，另外，一個自我定義可變電容大訊號模型亦被提出。第四章與第五章分別為24 GHz 汽車防撞雷達發射與接收系統，第四章的發射系統電路架構是由第三章的差動壓控振盪器和兩級串接功率放大器所組成，操作的頻率為21.7到26 GHz，輸出功率皆大於13 dBm。第五章的接收系統電路架構包含第三章的差動壓控振盪器、低雜訊放大器、緩衝放大器及混頻器，射頻端操作頻率涵蓋22到26 GHz，射頻端至中頻端的轉換增益皆在9 dB以上，降頻後的中頻操作頻率為0.1到3.4 GHz。第六章則是利用台積電的0.18 ?m互補式金氧半場效電晶體製程來設計頻率合成器，且在閉迴路狀態下量測到頻率合成器輸出頻率鎖定1.472 GHz的結果。第七章為結論。 The goal of the thesis is to design and implement a 24-GHz radar integrated circuits for the automotive radar applications. The radar integrated circuits have been designed and fabricated using WIN Semiconductors 0.5-?m E/D-PHEMT technology. First, the introduction and the theory of the oscillation are presented in chapter 1 and chapter 2, respectively. In chapter 3, a differential voltage controlled oscillation circuit is presented for K-band applications. The frequency of the differential VCO is from 18.8 to 27.5 GHz with a tuning bandwidth of 38% and an output power of higher than 4 dBm. The differential VCO demonstrates a figure-of-merit of -177 dBc/Hz. Besides, a user-defined varactor model has been presented in this chapter. The radar receiver and transmitter for the automotive radar applications are presented in chapter 4 and chapter 5, respectively. The radar transmitter consistes of a differential VCO and a two-stage power amplifier. The frequency of the radar transmitter is from 21.7 to 26 GHz with an output power of higher than 13 dBm. The radar receiver consistes of a differential VCO, a low noise amplifier, a buffer amplifier and a mixer. The RF frequency of the radar receiver is from 21.7 to 26 GHz with a conversion gain of higher than 9 dB and an IF frequency of from 0.1 to 3.4 GHz. The frequency synthesizer are presented using TSMC 0.18-?m CMOS peocess in chapter 6. The measured output frequency is locked at 1.472 GHz in close loop condition. Finally, the conclusion is given in chapter 7.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

Files in This Item:

File	Size	Format

社群 sharing

Loading...