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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/10463


    題名: 積體式微波帶通濾波器之研製;Design of Integrated Microwave Bandpass Filter
    作者: 廖偉宏;Wei-hung Liao
    貢獻者: 電機工程研究所
    關鍵詞: 砷化鎵;髮夾式;電容負載;GaAs;hairpin;capacitor loaded
    日期: 2009-07-21
    上傳時間: 2009-09-22 12:18:07 (UTC+8)
    出版者: 國立中央大學圖書館
    摘要:   本論文包含了射頻前端應用之積體式帶通濾波器與帶通式切換器(Filter integrated switch)的設計。 在論文的第一部份將著重在小型化的積體微波帶通濾波器設計。提出兩種積體式的電容負載髮夾型帶通濾波器架構,並採用商用砷化鎵半導體製程來實現。首先提出,一個三階帶通積體濾波器設計,中心頻率2.4GHz,比例頻寬12.5%,晶片面積僅需1*2mm2。止帶頻寬上限可達10倍中心頻,並具有一傳輸零點。此架構在通帶內擁有理想的柴比雪夫響應,針對設計步驟也詳細描述。 本論文的第二部份提出一個新的架構來實現積體化帶通式切換器,結合了帶通濾波器功能與切換器的功能至單一電路中。在濾波器導通狀態時,此積體化帶通式切換器能夠提供帶通響應與倍頻抑制;而在濾波器關閉狀態時,此電路能提供寬頻的隔絕特性。所提出的積體化帶通式切換器設計在中心頻率為3.5 GHz,導通時比例頻寬為11.4%,晶片面積僅需1*2mm2。在導通狀態時,20dB的倍頻抑制能力到8.5倍中心頻,而在關閉的狀態時具有30dB以上的隔絕度從低頻到8.5倍中心頻。 本論文所提之積體式濾波器和帶通式切換器具微小化電路面積、寬頻的隔絕特性、設計簡單等優勢,在未來可積體化於收發機系統晶片中,實現單晶片設計。 In this study, the integrated design of microwave bandpass filters and filter intrgrated switches for RF application are proposed. First part of the study focuses on the design of miniaturized and integrated microwave bandpass filter. An integrated hairpin bandpass filter structure with loaded capacitor are proposed and implemented using the commercial GaAs semiconductor process. Specifically, a third-order bandpass filter with a center frequency of 2.4GHz and fractional bandwidth of 12.5% is implemented, with a chip size of only 1*2mm2. In addition, the upper stopband can be extended up to 10 f0, with one transmission zero in the upper stopband. The proposed filter can achieve structure has ideal chebyshev response in the passband, and detailed design procedures are also addressed in this study. The second part of the study presents a new structure for implementing filter intrgrated switches. The filter intrgrated switches integrates the functions of switch and bandpass filter into a single circuit component, which can provide bandpass response with harmonic suppression in the on-state and wideband isolation in the off-state. Specifically, integrated filter intrgrated switches with center frequency of 3.5GHz and fractional bandwidth of 11.4% are proposed, with a chip size of only 1*2mm2. The spurious suppression of 20dB about up to 8.5f0 in the on-state, and the isolation can be greater than 30dB from dc to 8.5f0 in the off-state. The integrated bandpass filters and filter intrgrated switches in this study have the advantages of very compact size, wide stopband and simple in design. It can be integrated into transceiver MMIC so as to achieve SOC in the future.
    顯示於類別:[電機工程研究所] 博碩士論文

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