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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/32095


    Title: Raisin: Redundancy analysis algorithm simulation
    Authors: Huang,Rei-Fu;Li,Jin-Fu;Yeh,Jen-Chieh;Wu,Cheng-Wen
    Contributors: 電機工程研究所
    Keywords: EMBEDDED-MEMORY;YIELD
    Date: 2007
    Issue Date: 2010-07-06 18:18:29 (UTC+8)
    Publisher: 中央大學
    Abstract: To increase redundancy repair efficiency and thus final yield in embedded-memory cores, we propose Raisin, a redundancy analysis algorithm simulation tool that can calculate an RA algorithm's repair rate, yield, associated memory configuration, and redund
    Relation: IEEE DESIGN & TEST OF COMPUTERS
    Appears in Collections:[Graduate Institute of Electrical Engineering] journal & Dissertation

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