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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/32382


    Title: A low-power high-driving ability voltage control oscillator used in PLL
    Authors: Cheng,KH;Yang,WB;Chung,CF
    Contributors: 電機工程研究所
    Keywords: PHASE-LOCKED LOOP;FREQUENCY DETECTOR;CMOS;JITTER;DESIGN;BUFFER;MHZ;OPERATION;CIRCUIT;NOISE
    Date: 2004
    Issue Date: 2010-07-06 18:25:54 (UTC+8)
    Publisher: 中央大學
    Abstract: Modern high-speed CMOS processors using on-chip phase-locked loop (PLL) often require a clock buffer with stringent specifications on the rising time and falling time of the signal rather than on the delay time of the buffer. For these applications, we pr
    Relation: INTERNATIONAL JOURNAL OF ELECTRONICS
    Appears in Collections:[電機工程研究所] 期刊論文

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