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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/44781


    題名: 以多重耦合線實現多功能帶通濾波器;Multi-Functional Bandpass Filter Designs with Multicoupled Line
    作者: 游秋雯;Chiou-Wen You
    貢獻者: 電機工程研究所
    關鍵詞: 帶通濾波器;多重耦合線;bandpass filter;multicoupled line
    日期: 2010-08-20
    上傳時間: 2010-12-09 13:55:06 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文藉由多重耦合線接地端及電容負載之變化,實現兩類多功能帶通濾波器,分別為「具單端至平衡轉換功能之帶通濾波器」及「具功率分配器功能之帶通濾波器」。電容負載除了使得耦合線電氣長度可小於二十分之一波長,讓電路小型化外,也能提升止帶頻寬。此外,由於電路架構可等效為濾波器原型電路,因此可使用植入損耗法簡化設計流程。 在具單端至平衡轉換功能之帶通濾波器設計上,並提出增加階數及引入傳輸零點提昇濾波器選擇度的方法,電路以砷化鎵積體製程實現,中心頻率為5.5GHz,晶片面積可小於1.5×1mm2 (0.098λg×0.065λg)。通帶內平衡特性合於一般商用規格,並具有高選擇度及寬止帶,高頻側止帶抑制超過20dB可達12倍頻,而其損耗與一般積體式帶通濾波器植入損耗相當。此外,亦可應用於整合平衡至不平衡轉換器之單刀雙擲帶通濾波器,進一步整合射頻前端中多個功能方塊。 在具功率分配器功能之帶通濾波器設計方面,藉由加入隔離電阻與導納轉換器,在通帶內可提供良好的隔離度與輸出反射損耗,並提出利用奇偶模分析的設計方法。電路以砷化鎵積體電路實現,中心頻率為5.5GHz,晶片面積僅為1.5×1.5mm2 (0.098λg×0.098λg),並具有高選擇度及寬止帶,高頻側止帶抑制超過30dB可達10倍頻。而其損耗與一般積體式帶通濾波器植入損耗相當。 本論文提出的多功能帶通濾波器,具微小化電路面積、高選擇度、寬止帶與電路架構簡單等優勢,並提出完整設計流程與公式,將有助於縮小收發機製作面積、成本與設計時程。In this study, two kinds of multi-functional bandpass filter based on multicoupled line are proposed, which are the balun bandpass filter and the bandpass power divider. They are achieved by the proper placements of ground terminations and loaded capacitors of a multicoupled line. The effective length of the multicoupled line can be shorter than λ/20 by attaching loading capacitors, such that compact circuit size and wide stopband can be achieved. In addition, their circuit models can be equivalent to the bandpass filter prototype. Therefore, the proposed multi-functioal filters can be easily designed using the insertion loss method. The design of balun bandpass filters is first presented. The design methods for higher order filter response and for introducing transmission zero are proposed. Specifically, balun bandpass filters are implemented using the GaAs pHEMT process with a center frequency of 5.5GHz. The chip sizes are less than 1.5×1mm2 (0.098λg×0.065λg). The measurement results show that the in-band amplitude imbalance and phase difference at the balanced ports meet commercial application requirements. In addition, wide stopband and high selectivity are obtained. The upper stpoband rejection is better than 20dB up to 12f0. Moreover, the proposed balun filter can be further integrated with SPDT switch to achieve highly-integrated RF front-end design. The second part of the thesis is focused on the design of bandpass power divider. The proposed circuit structure provides good in-band matching and isolation by the introduction of additional isolation resistor and admittance inverters. It can be simply designed by the even-odd mode analysis. Specifically, a third-order integrated bandpass power divider with a center frequency of 5.5GHz is implemented in a chip size of only 1.5×1.5mm2 (0.098λg×0.098λg). In addition, wide stopband and high selectivity are obtained. The upper stpoband rejection is better than 30dB up to 10.3f0. Compared to related previous works, the insertion loss and size are similar to conventional integrated bandpass filters, but two functions are included in the proposed design. The proposed multi-functional bandpass filters have the advantages of compact size, high selectivity, and wide stopband with simple circuit topology. The complete design procedure and design equations are also proposed. It is believed that this will help reduce the size, cost and design steps of RF front-end.
    顯示於類別:[電機工程研究所] 博碩士論文

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