二維無接面場效電晶體之模擬與分析;Analysis and Simulation of Two-Dimensional Junctionless MOSFET

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Title:	二維無接面場效電晶體之模擬與分析;Analysis and Simulation of Two-Dimensional Junctionless MOSFET
Authors:	蘭孟樵;Lan,Meng-chiao
Contributors:	電機工程研究所
Keywords:	無接面場效電晶體;Junctionless MOSFET
Date:	2012-07-09
Issue Date:	2012-09-11 18:52:03 (UTC+8)
Publisher:	國立中央大學
Abstract:	在本篇論文中，首先先介紹無接面電晶體的基本操作原理與優點，我們利用二維元件模擬來模擬無接面電晶體元件內部的電位分佈，並且可由電位分佈看出空乏區的寬度，而空乏區的寬度直接影響此元件是否處於導通的狀態，進而可以得知近似的臨限電壓，以及電流對於電壓變化的情況，當元件所外加的閘極電壓達到平帶電壓值時，對於元件本身會產生的反應，並且討論無接面電晶體元件在次臨限區域時，其開關的速度與傳統場效電晶體的比較，同時也使用Poisson’s equation推導無接面電晶體元件二維的空乏區公式，再由空乏區公式推導臨限電壓，並且將此推導結果與我們利用二維元件模擬器得到的模擬結果做比較。In this thesis, at first we introduce basic operating principles and advantages of the junctionless transistor. We use the two-dimensional device to simulate the potential distribution of the junctionless transistor and then we get the width of the depletion region. The width of the depletion region will decide whether the device is turning on or not, and also we can figure the approximate threshold voltage and the relation between current and voltage. We also discuss the device quality when we apply one voltage source on the gate is more over than the flat-band voltage. And compare the switch speed of the junctionless transistor with a normal transistor, when we operating them in the sub threshold region. Also, we try to derive the equation of the width of the depletion region from Poisson’s equation, and furthermore figure the threshold voltage. At last, we compare the equations with the result we have simulated in two-dimensional device.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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