提升可撓式薄膜電晶體之類比電路可靠度的快速自動化設計方法;Fast Reliability-Aware Automatic Sizing Approach for the Analog Circuits with Flexible TFTs

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題名:	提升可撓式薄膜電晶體之類比電路可靠度的快速自動化設計方法;Fast Reliability-Aware Automatic Sizing Approach for the Analog Circuits with Flexible TFTs
作者:	吳宛蓉;Wu,Wan-Rong
貢獻者:	電機工程研究所
關鍵詞:	設計;可撓式;薄膜電晶體;類比電路;可靠度;自動化;Automatic;Sizing Approach;Analog Circuits;Flexible TFTs;Reliability
日期:	2012-08-16
上傳時間:	2012-09-11 18:55:12 (UTC+8)
出版者:	國立中央大學
摘要:	軟性電子(flexible electronics)具有許多優點，常應用於可攜式產品。由於可撓式薄膜電晶體許多特性與傳統CMOS 不同，CMOS 設計技術不能直接應用於軟性電子產品上，而且激烈的參數變化和產品老化效應會對軟性電子電路的設計形成巨大的挑戰，尤其是敏感的類比電路，因此一套可提升軟性電子可靠度的電路設計方法是必不可少的。本論文提出了一種針對可撓式薄膜電晶體的類比電路自動化最佳化技術，來解決軟性電子中激烈的參數變化和電路老化效應的問題。為了提高精準度與電路設計流程的效率，本論文將最壞情況距離(worst case distance)的概念導入以方程式為基礎的自動化設計流程中，可撓式薄膜電晶體的特殊性質，例如激烈的參數變動敏感、彎曲效應、臨界電壓漂移現象等等，都有考慮在最佳化流程之中，可有效提高良率。此外，本論文提出了一種在電路設計流程當中快速預估電路老化後參數的近似方式，可以有效地考慮電路效能漂移現象。實驗結果顯示，本論文提出的自動化設計方式，可以考量電路可靠度的問題，有效地提高設計良率和產品的壽命，解決了軟性電子類比電路設計的問題。Flexible electronics are possible alternative to conventional silicon electronicsfor portable consumer applications with many advantages. Due to quite differentproperties of flexible TFTs, conventional CMOS design techniques cannot be useddirectly on flexible electronics. The severe parameter variations and aging effects offlexible electronics are big challenges for circuit designers, especially for sensitiveanalog circuits. Robust circuit design methodology is essential to implement morecomplex applications with flexible electronics.This thesis proposes an automatic robust optimization technique for analogcircuits with flexible TFTs to deal with the severe parameter variations and agingeffects. To improve both accuracy and efficiency of the circuit sizing procedure, theWCD concept is integrated into equation-based sizing approach in this work tooptimize the design yield with accurate variation consideration. The differentproperties of flexible TFTs such as bending and severe Vt variation are considered inthe optimization algorithm. Furthermore, this thesis proposes a fast approximationtechnique to predict the parameter aging in the circuits to consider the shiftedperformance in the circuit sizing procedure. As demonstrated on different cases withflexible electronics, the proposed robust optimization technique can significantlyimprove the fresh design yield and the lifetime yield, which solves the main difficultyof designing the analog circuits with flexible electronics.
顯示於類別:	[電機工程研究所] 博碩士論文

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