電阻式記憶體(RRAM)有著結構簡單的特性，因此具有發展高密度記憶體的潛力，本研究的研究重點即在於利用垂直結構來提高元件的密度，且雙層垂直電阻式記憶體更能有效發揮出高密度的特點。 實驗分為兩部分，第一部分是討論二氧化鉿薄膜製作之雙層垂直電阻式記憶體在不同二氧化鉿厚度及操作面積的情況下其電性的比較。第二部分是討論不同厚度之非晶矽薄膜於垂直電阻式記憶體的電性比較，選擇二氧化鉿以及非晶矽薄膜做為介電層的原因為這兩種材料皆與CMOS製程相容，且 LPCVD 沉積的非晶矽和 ALD沉積的二氧化鉿皆具有良好的階梯覆蓋率。 在雙層垂直電阻式記憶體的實驗中我們可以看到元件可獨立操作，彼此在讀寫時不會互相干擾，且上下兩個電阻式記憶體之I-V特性也相近，較薄的二氧化鉿厚度有著較小的 set voltage 和較佳的耐久力；另外非晶矽薄膜垂直電阻式記憶體在連續操作後仍可維持足夠的記憶窗口，元件的記憶保持力也沒有問題，從結果可以看到較薄的非晶矽薄膜較適合拿來當作垂直電阻式記憶體的介電層。 The essential structure of resistive-switching random access memory (RRAM) could be fabricated on capacitor-like metal/insulator/semiconductor (MIS) or metal/insulator/metal (MIM) stack. The simple structure is promising for development of high density nonvolatile memory (NVM). This research focused on increasing the storage density of RRAM by fabricating vertical structure which including double-layered structure to enhance the improvement of bit-per-area more efficiently. There are two main sections in this thesis. The HfO2-based double-layered vertical RRAM (VRRAM) will be demonstrated in the first section with different dimension and thickness of HfO2 switch layer. In the second section, we demonstrated an amorphous-silicon-based VRRAM with different thickness of a-Si. HfO2 and a-Si are both compatible with CMOS fabrication process and which are also possessed of superior step coverage to fulfill the vertical structure. Independent access between different bottom electrodes could be achieved in double-layered VRRAM which accomplished multi-bit operation. The characteristic of the two adjacent cells in the same vertical stack are identical due to excellent program/read disturbance immunity. The HfO2-based VRRAM could achieve lower set voltage (Vset) and better endurance with thinner HfO2 switch layer. The endurance and retention of amorphous-silicon-based VRRAM are both satisfactory with appropriate thickness of a-Si.
