中大機構典藏-NCU Institutional Repository-提供博碩士論文、考古題、期刊論文、研究計畫等下載:Item 987654321/65596
English  |  正體中文  |  简体中文  |  Items with full text/Total items : 80990/80990 (100%)
Visitors : 41650952      Online Users : 1447
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version


    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/65596


    Title: 物件偵測嵌入式硬體加速器設計與實作;Design and Implementation of Hardware Accelerator for Embedded Object Detection
    Authors: 陳泓霖;Chen,Hung-lin
    Contributors: 資訊工程學系
    Keywords: 軟硬體共同設計
    Date: 2014-07-11
    Issue Date: 2014-10-15 17:05:57 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 在現今機器視覺系統多以SoC嵌入式軟硬體整合方法設計,使用FPGA取代多個DSP模組。在傳統的開發中,通常依據需求先設計軟體雛型,接著再將某些模組硬體化,達成軟硬體共同設計之系統。硬體模組多以連續串流進行設計,然而這種方法較缺乏彈性,當需求只要小小改變時,整個硬體模組可能就不適用需要重新規劃。
    本論文提出嵌入式視覺軟硬體設計方法論,以IDEF0進行系統分析,將需求階層式模組化切割為多個子模組,再以Grafcet建立各個子模組的離散事件模型,透過快速對應產生軟體語言及硬體語言,此方法論的優點是開發者在系統開發前期不需撰寫程式。另外本論文提出硬體介面控制器,針對軟硬體共同設計之平台,在開發者針對不同目標需求(效能、彈性、成本、耗電)選用硬體模組時,不必重新規劃硬體模組間的設計,只需要透過軟體控制即可規劃硬體模組執行之順序,增加硬體模組之開發彈性,加快系統開發流程。
    ;In recent years, most of the machine vision systems use embedded hardware and software co-design, which uses FPGA to replace some DSP modules. In traditional development, we first design software prototype and then choose some modules that designed by hardware. We use a series designed to connect this hardware modules to compose hardware architecture. However, this type of architecture lacks flexibility. If system requirements just need to do a little change, the architecture need to whole redesign.
    In this thesis, we propose embedded vision hardware and software co-design methodology. Firstly, we analyze the system requirements with IDEF0. This way is analysis whole system hierarchically and divided into many modules. Secondly, we use Grafcet establish discrete event model for every modules. Then we through the way of Grafcet synthesis to produce software code and hardware design. This development approach needs not coding in prophase of system design. Additionally, we design a hardware interface controller, which is suitable in hardware and software co-design architecture. This controller contains all of hardware modules, and designers can select desired target modules according to system requirements which include efficacy, elasticity, cost, and power consumption. It is not necessary to redesign hardware architecture, the designer just to change the order of hardware modules through software. The hardware interface controller can increased development flexibility, and accelerate the system development process.
    Appears in Collections:[Graduate Institute of Computer Science and Information Engineering] Electronic Thesis & Dissertation

    Files in This Item:

    File Description SizeFormat
    index.html0KbHTML413View/Open


    All items in NCUIR are protected by copyright, with all rights reserved.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明