二維梯形模組在半導體元件模擬之驗證與探討;Verification of 2D Trapezoid Element in Semiconductor Device and Comparasion with its Simplified Method

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Title:	二維梯形模組在半導體元件模擬之驗證與探討;Verification of 2D Trapezoid Element in Semiconductor Device and Comparasion with its Simplified Method
Authors:	侯泰安;Hou,Tai-an
Contributors:	電機工程學系
Keywords:	梯形網格;2D網格;環繞式閘極;模擬;Trapezoid mesh;Simulation;Gate-All-Around
Date:	2014-07-01
Issue Date:	2014-10-15 17:08:09 (UTC+8)
Publisher:	國立中央大學
Abstract:	本篇論文中，在探討與開發改良式梯形網格並且應用於環繞式閘極 MOSFET 模擬相關特性。為了探討其元件特性，我們運用基礎半導體理論波松方程式、電子連續方程式與電洞連續方程式，建構出2D梯形模組進行模擬。為了改善一般梯形網格在大角度時會使外心超出邊界造成的嚴重的誤差，所以研發出簡化版梯形模型來改善這個缺點，，並也將模擬結果與理論做比較，驗證其正確性，最後在使用新開發出的模型製作出MOS-Capacitor來量測出VTH 。 ;This thesis explores and develops an improved trapezoid mesh and applies it to the 2D simulation of surrounding gate MOSFET. We use Poisson′s equation, electron continuity equation and hole continuity equation to construct a trpezoid Element mesh for 2D numerical simulation. The circumcentre will exceed the boundary in the large angle. The phenomenon will cause a serious mistake. For improving this problem, the simple model of circumcentre is developed. We also verify the simulation result with the theory. Finally, the use of newly developed models to produce a MOS-Capacitor to measure the VTH .
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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