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    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/65726


    题名: 應用於高傳輸率4X4 MIMO-OFDM系統之軟式多輸入輸出解碼器與系統效能驗證;Soft-Output MIMO Detector and System Verification for High-Throughput 4x4 MIMO-OFDM System
    作者: 駱柏丞;Lo,Po-chen
    贡献者: 電機工程學系
    关键词: 球面解碼器;軟輸出;渦輪解碼器;sphere decoder;soft-output;turbo decoder
    日期: 2014-07-18
    上传时间: 2014-10-15 17:08:59 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文將介紹應用於室內的多輸入多輸出正交分頻多工調變高傳輸率無線通訊系統之相關設計。外發送機採用渦輪編碼來提升系統效能,而內發送機支援4根傳送天線、64-QAM星座圖及512、256、128三種不同快速傅立葉轉換點數的子載波模組。而內接收機的部分整合了同步偵測、通道估測以及多輸入輸出訊號的解碼三種功能區塊,而多輸入輸出訊號的解碼器為了配合外接收機所使用的渦輪解器,我們設計了能傳遞軟值的非固定K值K-Best球面解碼器,並結合ODE演算法下所產生的捨棄路徑來改善系統效能,此外,我們還針對捨棄路徑與效能的關係做分析,並提出了獨立式路徑選擇法與合併式路徑選擇法兩種不同的方法來減少捨棄路徑部分的硬體的複雜度,獨立式路徑選擇法擁有較低的複雜度,並且硬體實做較為簡單;合併式路徑選擇法則有較好的效能。在硬體實現的部分則採用整體複雜度較低且擁有不錯效能的獨立式路徑選擇。本論文的最後整合了內外發送機,並在TGn的B、C、D通道模型下做系統效能的模擬,其中在空間相關性較低的通道模組中能得到較佳的效能。
      在晶片國家型計畫中,我們將收發機燒錄至計畫開發的FPGA板中,並使用計畫設計的RF天線做資料的傳送與接收,最後成功的量測到符元邊界偵測與通道估測的結果。
    ;In this thesis, implementation of a MIMO-OFDM transceiver for indoor high throughput wireless communication systems is presented. Turbo encoder at the outer transmitter is used for improving performance. The inner transmitter supports 4 antennas, 64-QAM constellation and three operation models for different numbers of subcarrier (512, 256 and 128 point). At inner receiver, three main function block of synchronization, channel estimation and MIMO detection are implemented. To support Turbo decoding in the outer receiver, we design a soft-output K-Best sphere decoder. Which uses discard paths to improve the performance of system. Observing analyzing the relationship between the number of discard paths and performance, we propose independent path selection method and merged path selection method to reduce the complexity of discard paths. Independent path selection method has lower complexity and is suitable for hardware implementation. Merge path selection method has better performance. In the hardware implementation, we choose the Independent path selection method because of low complexity and good performance. In the end, we integrate inner and outer transceiver, and simulate the system performance in TGn channel model.
       In the project, we download the transceiver design into the FPGA, and integrate the RF analog frount-end. Finally we measure the signals of symbol boundary detection and channel estimation.
    显示于类别:[電機工程研究所] 博碩士論文

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