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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/65837


    Title: 具氮化鎵表面披覆層之空乏型氮化鋁銦/氮化鎵場效電晶體之直流與動態特性研究;Direct Current and Dynamic Characteristics of Depletion Mode AlInN/GaN Field-Effect Transistors with a GaN Cap Layer
    Authors: 凃伯璁;Tu,Po-tsung
    Contributors: 電機工程學系
    Keywords: 氮化鎵;氮化鋁銦;崩潰電壓;動態電阻;閘極絕緣層;披覆層;GaN;AlInN;Breakdown voltage;Dynamic on-resistance;Gate insulator;Cap layer
    Date: 2014-08-27
    Issue Date: 2014-10-15 17:11:30 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 本論文主要內容為探討表面氮化鎵披覆層對於氮化鋁銦/氮化鎵電晶體元件特性的影響,期能利用此披覆層改善傳統氮化鋁銦漏電流和崩潰特性不佳的問題。利用一維Poisson方程式模擬具不同表面披覆層厚度之材料電子濃度和能帶,並使用TCAD模擬不同磊晶層在截止偏壓下之電場分佈。模擬指出相較於表面沒有披覆層之結構,表面具有一26 nm披覆層後,其二維電子氣濃度會因為導電帶抬升而降低,靠近汲極端的閘極邊緣電場峰值則由15.16 MV/cm降低到2.22 MV/cm。此反極化效果因可抬升能帶,降低閘極漏電流,分散電場,故使元件之截止態崩潰電壓大幅提升。
      本研究所製作的高電子遷移率電晶體(蕭基接面場效電晶體)之直流和動態特性顯示,表面具有26 nm披覆層的元件具有一低開啟電阻(2.68 mΩ-cm2),其最低的截止態漏電流為114 μA/mm,最大的截止態崩潰電壓為172 V。在具有13 nm表面披覆層的結構上製作具二氧化矽閘極絕緣層的金氧半場效電晶體,崩潰電壓可進一步提升至675 V。實驗結果顯示,氮化鎵表面披覆層除了可降低元件閘極電場,更能有效降低電流崩塌效應與動態電阻值。此外,藉由變溫動態電阻量測,磊晶缺陷的活化能亦有初步推估結果。
    ;In this work the influence of GaN cap layer on the performance of AlInN/GaN HEMTs (high electron mobility transistors) is studied to improve issues such as high leakage current and low breakdown voltage often found on conventional AlInN HEMTs. The two dimensional electro gas concentration and band structure of AlInN/GaN HEMTs with different GaN cap layer thickness is estimated by 1-D Poisson simulator. Silvaco TCAD simulator is also used to simulate the distribution of electric field of the device operated under off-state condition. Compared with the AlInN HEMTs without a cap layer, the HEMTs with a 26 nm GaN cap layer have lower sheet electron concentration due to the raised conduction band neat the gate, and lower peak electric field at the gate edge toward the drain side, i.e. decreasing from 15.16 MV/cm to 2.22 MV/cm. It is shown that due to the reverse polarization field associated with the GaN cap layer, which raises the conduction band, spreads the electric field at the gate edge, and decreases the gate leakage current, the breakdown voltage of the devices is significantly enhanced.
      Among the devices with different cap thickness, HEMTs (Schottky gate FETs) with a 26 nm cap exhibit the lowest Ron of 2.68 mΩ-cm2, the lowest Id,off of 114 μA/mm, and the highest Vbk of 172 V. It is also demonstrated that off-state breakdown voltage as high as 675 V can be realized on MIS-FETs with a 13 nm SiO2 gate insulator. In addition, AlInN HEMTs with a GaN cap layer also exhibit improved dynamic on-resistance characteristics. The activation energies associated with the defects in the material are also analyzed by temperature-dependent dynamic on-resistance measurements.
    Appears in Collections:[電機工程研究所] 博碩士論文

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