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|Issue Date: ||2015-09-23 10:56:35 (UTC+8)|
|Abstract: ||本研究分為三個部分，第一個部分是以奈米球微影術與金屬催化化學蝕刻法製備出大面積規則有序排列之矽單晶奈米線陣列，之後以側壁鍍膜法在上面鍍製鈦金屬與非晶矽，經由高溫熱退火形成金屬矽化物奈米管陣列，並探討經由不同退火溫度之生成相為何；第二個部分是以溼式蝕刻法製備出不同晶面的超薄矽晶圓，並在其上製備出矽單晶奈米線陣列；第三個部分是關於矽單晶奈米線轉附製程之研究，藉由兩步驟蝕刻法製備出底部有多孔性結構之矽單晶奈米線陣列，之後將其轉附於已經塗有Epoxy之可撓曲軟板上，施以剪切力分開底部基材與矽單晶奈米線。 |
;There are three parts in this study. The first is fabrication of large area single-crystalline SiNWs array by nanosphere lithography and metal-assisted chemical etching, then deposited titanium and amorphous-silicon on the SiNWs array by lateral deposition, and treated it with high temperature to form metal silicide nanotubes array, and discussed the forming phases during various temperature; the second is fabrication of various orientation of ultra-thin silicon wafer by wet etching, then fabricated single-crystalline SiNWs array on ultra-thin silicon wafer; the third part is the research about transfer of single-crystalline SiNWs array. By second etching process, the bottom of SiNWs would be etched to form porous structure, then transferred to flexible plate with epoxy, used sheer force to divide SiNWs array from silicon substrate.
As the large area single-crystalline SiNWs array was fabricated by nanosphere lithography and metal-assisted chemical etching. In order to obtain thinner SiNWs, high temperature oxidation was applied to reducing the size of SiNWs, and the diameter was 40 nm by TEM observation, also the arrangement of SiNWs remained arrayed by SEM observation, then titanium and amorphous-silicon were deposited on the SiNWs by lateral deposition and treated it with high temperature annealing. The role of amorphous-silicon is to passivate ambience. Herein we discussed and analyzed the forming phases and structure during various temperature by Raman spectroscope and TEM respectively.
Also in this study we fabricated different orientation of ultra-thin silicon wafer by metal-assisted electroless etching process, and discussed the influence during various temperature and concentration of etching solution, choosen the best condition to fabricate ultra-thin silicon wafer, and the condition is also suitable for other orientation silicon wafer from transmittance. It means that the etching process not only thinned the silicon wafer successfully but also modified the surface of silicon wafer. In this study, SEM was applied to observing the thickness and surface of ultra-thin silicon wafer, AFM was applied to analyzing the surface structure detailedly, the surface roughness of different orientation ultra-thin silicon wafer is better than the reference using wet etching process. So the process applied to fabricating ultra-thin silicon wafer in this study is an excellent method.
At the last of this study, SiNWs array was transferred to flexible plate by second etching process, the bottom of SiNWs would form porous structure by TEM observation, and we guess the forming mechanism is isotropic etching during second etching process in high concentration H2O2 of etching solution, so the bottom of SiNWs would be etched latterly. As the SiNWs array was divided from silicon substrate, we can use less sheer force to transfer the SiNWs array on the flexible plate.
|Appears in Collections:||[化學工程與材料工程研究所] 博碩士論文|
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