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    题名: 應用於多點協作多輸入輸出幾何平均分解之前編碼演算法及硬體設計;Design and Implementation of GMD-based Precoding for Coordinated Multi-points (CoMP) Applications
    作者: 葉靖亨;Yeh,Ching-heng
    贡献者: 電機工程學系
    关键词: 多點協作;幾何平均分解;前編碼演算法;多輸入輸出系統;聯合處理;天線選擇技術;湯林遜哈洛希瑪前編碼演算法;座標軸旋轉數位計數器;Coordinated multi-points (CoMP);Geometric mean decomposition (GMD);Precoding;Multiple-input multiple-output (MIMO);Joint processing (JP);Antenna selection;Tomlinson-Harashima precoding;Coordinate Rotation Digital Computer (CORDIC)
    日期: 2015-07-14
    上传时间: 2015-09-23 14:25:38 (UTC+8)
    出版者: 國立中央大學
    摘要: 在3GPP LTE-Advanced中,利用OFDM的特性消除其內部干擾,但基地台間的干擾仍然存在。當使用者位於基地台的服務邊緣時,會受到鄰近的基地台訊號干擾,使得接收訊號的品質下降,而多點協作(Coordinated multiple points, CoMP)技術則被提出來解決這個問題。在此論文中,我們將幾何平均分解(GMD)應用於多點協作聯合處理(CoMP-JP)上,由於聯合處理之奇異質分解(JP-SVD)的效能會受到最弱的通道增益影響而衰減,為了獲得相同的空間通道增益,我們提出聯合處理之幾何平均分解(JP-GMD)來獲得所有協作之基站(cell sites)的前編碼矩陣和解碼矩陣,我們也使用球面解碼來達到最大相似解以追求更高的效能。同時,我們使用集中式的THP演算法消除剩餘的干擾,稱為JP-GMD-THP。相較於JP-SVD、JP-ZF、JP-MMSE,使用球面解碼之JP-GMD擁有最佳的效能。相較於使用球面解碼之JP-GMD,one-tap等化的JP-GMD-THP僅損失0.7dB的效能。為了減少每個基站的工作量和保有空間多樣性的優勢,我們提出兩種天線選擇技術,最佳選擇準則和分組選擇準則,相較於沒有協作(non-cooperative)之基站,兩種方法皆能有效地提高效能(bit error rate)。
    在硬體設計方面則根據現有的穩定吞吐量(throughput)與高吞吐量的幾何平均分解進而設計出非方陣型的8×4幾何平均分解法,包含所提出的8×4雙對角矩陣分解架構、2×2 奇異值分解(SVD)和2×2幾何平均分解(GMD)以及提出新式非對角矩陣的更新法,使用Givens Rotation演算法來實現硬體,採用Systolic array的硬體架構,並利用管線化(pipeline)來提高吞吐量,而所提出的架構之吞吐量可達到每秒運算17.875M個矩陣(matrices/sec),且從比較表中可以看出,經正規化後所提出的硬體相較於其他相關作品有不錯的硬體效能表現。
    ;In this thesis, we discuss the precoding schemes for coordinated multi-point (CoMP) joint processing (JP) using geometric mean decomposition (GMD). Unlike JP singular value decomposition (JP-SVD) whose performance is dominated by the spatial pipe with weak channel gain, JP-GMD is proposed to derive the precoding matrix of all the cooperative cell sites and the decoding matrix of the user equipment (UE) so that equal spatial channel gains can be obtained. Sphere decoding (SD) is then employed to achieve the maximum likelihood (ML) solution. Besides, centralized Tomlinson Harashima precoding (THP) can be adopted at the base station to remove interference, called JP-GMD-THP. We show that the JP-GMD plus SD scheme has significant performance improvement over JP-SVD, JP-zero forcing (ZF) and JP-minimum mean square error (MMSE). JP-GMD-THP that allows simple one-tap equalization has performance loss only about 0.7 dB compared to the JP-GMD plus SD scheme. Furthermore, to reduce the joint processing efforts at all cell sites and to take advantage of the spatial domain, two antenna selection techniques, best antenna selection and grouping antenna selection, are also proposed. As opposed to the best antenna selection, the grouping antenna selection technique can reduce search efforts with about 0.5 dB SNR degradation, but is still better than the non-cooperative schemes.
    In hardware implementation, we design the architecture of JP-GMD according to our proposed algorithm. We simulate our proposed architecture by C language, and we implement our design in Verilog. A constant and high throughput GMD for matrix with of 8×4 is designed. The architecture of 8×4 JP-GMD includes 8×4 matrix bi-diagonalization, 2×2 SVD, 2×2 GMD and the proposed non-diagonal element updating. Givens Rotation algorithm is used to implement our design and systolic array architecture is adopted. Pipeline technique is employed to increase the throughput, which achieves 17.875M matrices/sec. From the comparison, the proposed architecture has good normalized throughput than the prior works.
    显示于类别:[電機工程研究所] 博碩士論文

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