基於對數概似比演算法且可配置天線組 態之快速軟性輸出多輸入多輸出偵測器;A High Speed Antenna-Configurable Soft-output MIMO Detector Based on Log-likelihood Ratio Algorithm

NCU Institutional Repository > 資訊電機學院 > 電機工程研究所 > 博碩士論文 > Item 987654321/68804

請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/68804

題名:	基於對數概似比演算法且可配置天線組態之快速軟性輸出多輸入多輸出偵測器;A High Speed Antenna-Configurable Soft-output MIMO Detector Based on Log-likelihood Ratio Algorithm
作者:	吳東霖;Wu,Tung-lin
貢獻者:	電機工程學系
關鍵詞:	偵測器;軟性輸出;多輸入多輸出;Detector;Soft-output;MIMO
日期:	2015-07-22
上傳時間:	2015-09-23 14:30:22 (UTC+8)
出版者:	國立中央大學
摘要:	本論文提出了一個具有概似比演算法的可平行快速解碼且天線組態可變的軟性輸出多輸入輸出偵測器，可支援QPSK 、16QAM 、64QAM 三種調變星座圖，天線方面可支援2x2~8x8 七種組態。由文獻可知道軟性輸出多輸出輸入偵測器可簡化成候選列表產生器與軟性值產生器兩個區塊，候選列表產生器能提供多組高可信度的訊號路徑，軟性值產生器藉由參考這些訊號路徑後，再去產生每一個位元的軟性值輸出。本論文所使用的候選列表產生器是基於傳統K 最佳演算法，並經過多層的延伸與排序，可以產生出K 組高可信度的訊號路徑並提供給後端的軟性值產生器，而軟性值產生器主要是實現概似比演算法，利用前端所提供的訊號路徑去產生每一個位元的軟性值，再利用這些軟性值去還原傳送端的實際訊號。本論文所使用的硬體架構為平行處理，除了可以提供高資料吞吐量外，且在天線組態改變的情況下，硬體使用率也可以達到百分之百，得到在不同的天線組態下也可以提供相同的資料吞吐量效果。;A high speed antenna-configurable soft-output MIMO detector based on log-likelihood ratio algorithm is proposed in this thesis. It can support three various modulation methods such as QPSK, 16QAM, 64QAM, and seven antenna modes such as 2 2 8 8. The soft-output MIMO detector can be simplified to two blocks which are candidate list generator and soft value generator. The candidate list generator can provide multiple signal paths with high confidence, and the soft value generator offer the soft value output of each bit by referencing these signal paths. The candidate list generator which is used in this thesis is based on traditional K-best algorithm and generates the K sets of high confidence signal paths for the back-end soft value generator by several extending and sorting. In order to recover the received signal into the correct signal, the soft value generator realizes the log-likelihood algorithm and generates the soft value output of each bit by using the high confidence signal paths which are provided by front-end candidate list generator. The proposed hardware implementation in this thesis is the parallel architecture. The proposed hardware Implementation in this thesis not only can provide highly-same throughput but also can achieve 100% hardware utilization in different antenna modes.
顯示於類別:	[電機工程研究所] 博碩士論文

文件中的檔案:

檔案	描述	大小	格式	瀏覽次數
index.html		0Kb	HTML	262	檢視/開啟

在NCUIR中所有的資料項目都受到原著作權保護.

社群 sharing

資料載入中.....