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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/68924

    Title: 使用波動數位濾波器與非線性MOS模型的類比電路模擬平台;A Simulation Platform for Analog Circuits Using Wave Digital Filters and Nonlinear MOS Model
    Authors: 韓易學;Han,Yi-Syue
    Contributors: 電機工程學系
    Keywords: 波動數位率波器;非線性MOS模型;wave digital filters;nonlinear MOS model
    Date: 2015-08-17
    Issue Date: 2015-09-23 14:46:43 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 目前的系統晶片(System-on-Chip, SOC)設計中,通常會同時包含數位電路和類比電路,因此類比/混合訊號(Analog/mixed-signal, AMS)電路的系統驗證在整個設計流程中更顯重要。但目前並沒有完整的AMS仿真器來支援整個系統驗證, 因此,在這篇論文中,我們利用波動數位濾波器(Wave Digital Filter, WDF)的原理,直接以數位電路來模擬類比電路的行為。此方法使用入射波與反射波的方式描述電路特性,把連續訊號的類比電路轉成離散的數位等效電路,因此每個電路元件都可以一對一對映至數位系統中。
    然而,在傳統的WDF原理之中,非線性元件無法有直接對映的方法,為了處理非線性的MOS元件,本論文提出一種WDF的非線性模型,並且使用查表法來提升非線性模型的準確度,在各種不同的製程與應用時,只需更改表格的內容,就能輕易應用在不同的製程。並且我們開發出一個WDF的軟體驗證環境,可以對SPICE netlist轉成WDF netlist進行功能模擬,並且與電晶體層級的模擬作比對,確認轉換過程的正確性,還可以讓之後開發不同的非線性元件模型時,能夠快速地評估各種模型的正確性與收斂度,用來減少未來製作硬體時的除錯時間。;Generally, it contains digital and analog circuits in current system-on- chip (SOC) design. It is very important to have a complete AMS system verification environment to speed up the design. Especially, there is not any AMS emulator commercially available at this moment. Therefore, in the thesis, we adopt Wave Digital Filter theory to simulate analog circuits by using digital elements. This method uses incident and reflected waves to describe circuit to that of the discrete digital circuit. Every analog element can be mapped into digital system one by one.
    However, there is no winning solution to map non-linear element directly in conventional wave digital theory. To deal with nonlinear MOSFET element, the thesis proposes a WDF-base nonlinear model. In addition, we use lookup table approach to promote accuracy of the nonlinear model that is easy to handle variety of processes and applications. A software verification environment is also developed to simulate WDF netlist and the SPICE netlist to check the accuracy of the transformation. For newly developed different nonlinear element models, we can quickly check the accuracy and the convergence rate of each model too. It can reduce dramatically the hardware debug time in the future design iteration.
    Appears in Collections:[電機工程研究所] 博碩士論文

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